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MF10CCWM PDF预览

MF10CCWM

更新时间: 2024-11-04 22:28:23
品牌 Logo 应用领域
美国国家半导体 - NSC 开关
页数 文件大小 规格书
20页 398K
描述
Universal Monolithic Dual Switched Capacitor Filter

MF10CCWM 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:PLASTIC, SO-20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:7.64有源滤波器类型:SWITCHED CAPACITOR FILTER
其他特性:CAUER FILTER CONFIGURATION CAN ALSO BE FORMED中心频率或截止频率最大范围:20 kHz
中心频率或截止频率最小范围:0.0002 kHzJESD-30 代码:R-PDSO-G20
JESD-609代码:e0长度:12.8 mm
湿度敏感等级:2A负电源电压最大值(Vsup):-7 V
负电源电压最小值(Vsup):-4.5 V标称负供电电压 (Vsup):-5 V
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
阶次:2ND封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):220极和零点:2 AND 0
认证状态:Not Qualified响应:UNIVERSAL
座面最大高度:2.65 mm子类别:Active Filters
最大供电电压 (Vsup):7 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30传递特性:BUTTERWORTH/BESSEL/CHEBYSHEV
宽度:7.5 mmBase Number Matches:1

MF10CCWM 数据手册

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December 1994  
MF10  
Universal Monolithic Dual  
Switched Capacitor Filter  
General Description  
The MF10 consists of 2 independent and extremely easy to  
use, general purpose CMOS active filter building blocks.  
Each block, together with an external clock and 3 to 4 resis-  
tors, can produce various 2nd order functions. Each building  
block has 3 output pins. One of the outputs can be config-  
ured to perform either an allpass, highpass or a notch func-  
tion; the remaining 2 output pins perform lowpass and band-  
pass functions. The center frequency of the lowpass and  
bandpass 2nd order functions can be either directly depen-  
dent on the clock frequency, or they can depend on both  
clock frequency and external resistor ratios. The center fre-  
quency of the notch and allpass functions is directly depen-  
dent on the clock frequency, while the highpass center fre-  
quency depends on both resistor ratio and clock. Up to 4th  
order functions can be performed by cascading the two 2nd  
order building blocks of the MF10; higher than 4th order  
functions can be obtained by cascading MF10 packages.  
Any of the classical filter configurations (such as Butter-  
worth, Bessel, Cauer and Chebyshev) can be formed.  
For pin-compatible device with improved performance refer  
to LMF100 datasheet.  
Features  
Y
Easy to use  
Y
g
Clock to center frequency ratio accuracy 0.6%  
Y
Filter cutoff frequency stability directly dependent on  
external clock quality  
Y
Y
Low sensitivity to external component variation  
Separate highpass (or notch or allpass), bandpass, low-  
pass outputs  
Y
Y
Y
Y
c
f
O
Q range up to 200 kHz  
Operation up to 30 kHz  
20-pin 0.3 wide Dual-In-Line package  
×
20-pin Surface Mount (SO) wide-body package  
System Block Diagram  
Connection Diagram  
Surface Mount and Dual-In-Line  
Package  
TL/H/10399–4  
Top View  
Order Number MF10AJ or MF10CCJ  
See NS Package Number J20A  
Order Number MF10ACWM or  
MF10CCWM  
See NS Package Number M20B  
Order Number MF10ACN or  
MF10CCN  
See NS Package Number N20A  
TL/H/10399–1  
C
1995 National Semiconductor Corporation  
TL/H/10399  
RRD-B30M115/Printed in U. S. A.  

MF10CCWM 替代型号

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