Datasheet > MD82C284-12/883

MD82C284-12/883

更新时间： 2024-11-04 21:53:31

品牌	Logo	应用领域
英特矽尔 - INTERSIL		晶体时钟发生器外围集成电路
页数	文件大小	规格书
9页	216K
描述
Clock Generator and Ready Interface for 80C286 Processors

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MD82C284-12/883 数据手册

82C284/883

Clock Generator and

Ready Interface for 80C286 Processors

March 1997

Features

Description

• This Circuit is Processed in Accordance to MIL-STD-

883 and is Fully Conformant Under the Provisions of

Paragraph 1.2.1.

The Intersil 82C284/883 is a clock generator/driver which

provides clock signals for 80C286 processors and support

components. It also contains logic to supply READY to the

CPU from either asynchronous or synchronous sources and

synchronous RESET from an asynchronous input with hys-

teresis.

• Generates System Clock for 80C286 Processors

• Generates System Reset Output from Schmitt Trigger

Input

- Improved Hysteresis

Ordering Information

• Uses Crystal or External Signal for Frequency Source

- Dynamically Switchable Between Two Input

Frequencies

PART NUMBER

TEMP. RANGE PACKAGE PKG. NO.

• Provides Local READY and MULTIBUS™ READY

Synchronization

MD82C284-12/883 -55 C to +125 C CERDIP

F18.3

• Static CMOS Technology

• Single +5V Power Supply

• Available in 18 Lead CERDIP Package

Functional Diagram

Pinout

RESET

82C284/883

(CERDIP)

RES

TOP VIEW

SYNCHRONIZER

ARDY

SRDY

SRDYEN

READY

EFI

18 VCC

17 ARDYEN

16 S1

XTAL

OSC

CLK

MUX

15 S0

EFI

F/C

14 NC

F/C

13 PCLK

12 RESET

11 RES

10 CLK

ARDYEN

ARDY

SYNCHRONIZER

READY LOGIC

GND

SRDYEN

SRDY

READY

PCLK

PCLK GENERATOR

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

FN2968.1

All other trademarks mentioned are the property of their respective owners.

12 3 4 5 6 7...9

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