1.0 Summary
The RoadRunner Application Specific Integrated Circuit
(ASIC) represents the 5th generation of Global Positioning
System (GPS) digital signal processing integrated circuits
used in Motorola commercial GPS products. When com-
bined with an RF down converter, microprocessor, and
application software, it can become the heart of a broad line
of high performance and low cost GPS sensors. The
RoadRunner ASIC provides additional features and
achieves higher levels of performance at the same time
being a driver for the design of low cost GPS applications.
The RoadRunner ASIC contains circuitry to simultaneous-
ly track up to eight satellites. Each independent receiver
channel within the ASIC can be commanded to acquire and
continuously track a single spread spectrum signal using any
of the GPS gold codes or the FAA WAASS PN codes. The
ASIC performs the following major functions of a GPS
receiver:
Digital signal processing software running in the micropro-
cessor controls the satellite tracking function by closing both
code and phase/frequency tracking loops and converting the
ASIC outputs into pseudorange and pseudorange–rate
measurements, and decodes and stores the satellite broad-
cast ephemeris and clock correction data for use in down
stream data processing software. These measurements and
data are subsequently used in the receiver’s PVT software
(position, velocity, and time) in order to translate the range
measurements and ephemeris data into user position
coordinates.
The RoadRunner’s extended features include:
•
•
Multiple microprocessor interface support (68330, 331,
332, 68HC000, 68EC000)
Full in–phase and quadrature outputs on PROMPT and
EARLY minus LATE correlators
•
•
•
•
•
Supports FAA WAASS PN codes
Runs from 5.0 or 3.3 Volt power supply
On–chip Real Time Clock
On–chip UART
Inexpensive 68 pin package
•
Samples the down converted IF signal with a 1 bit A/D
converter
•
Down converts the signal to baseband by removal of the IF
the carrier frequency
A top level block diagram of a typical GPS receiver using
•
•
•
Signal de–spread with a replica PN code
Doppler wipe off
Provides digital in–phase and quadrature PROMPT and
EARLY–minus–LATE outputs
the RoadRunner ASIC is detailed in Figure 1.1. Five major
subsystems are required to complete the design of a GPS
receiver. These subsystems include an antenna/LNA, a RF
downconverter (such as the Motorola MRFIC1502), a
reference oscillator, the RoadRunner ASIC, and a micropro-
cessor/memory system. When the RoadRunner ASIC is
combined with the GT Oncore system software, the GPS
receiver will receive, track, and decode data from up to 8
parallel satellites to provide high performance position,
velocity, and time data to a user application.
The microprocessor and software control each receiver
channel independently, and step the channel through the
satellite acquisition process until continuous track is
achieved. The acquisition and tracking functions are com-
pletely controlled by software, allowing for maximum flexibil-
ity for system enhancement and integration while
maintaining a cost effective implementation.
PWR
SW
VRAM
NON–VOLATILE
1–PPS
RAM
32K X 8
REAL TIME CLOCK
32 kHz OSCILLATOR
A(7:0), D(7:0)
128K X 8
MRFIC1502
LPF
BPF
FLASH ROM
128K X 8
BPF
LNA
128kX16
GLUELESS
INTERFACE
R/W, CS, ...
MPU
A/D
INTERFACE
MPU
F–IF
8 CHANNEL
BPF
68330
68331
68332
68000
68EC000
CORRELATOR
AND
CARRIER
WIPEOFF
MPU_CLK
SAMPLE CLK
I/O
PORT
PLL / VCO
CURRENT
SENSOR
V
CC
UART
MODULE
I/O PORT
CLK
GEN
REF OSCL
VCO
TUNE
SPI
GPIO
PWM’S
TEMP
SENSOR
Figure 1.1 A Typical GPS Reciever Block Diagram with a RoadRunner ASIC
MCS38140PG05C
2
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