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MCP618T-I/SL PDF预览

MCP618T-I/SL

更新时间: 2024-01-13 09:06:06
品牌 Logo 应用领域
美国微芯 - MICROCHIP 运算放大器放大器电路光电二极管信息通信管理
页数 文件大小 规格书
38页 637K
描述
2.3V to 5.5V Micropower Bi-CMOS Op Amps

MCP618T-I/SL 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:compliant风险等级:5.65
Base Number Matches:1

MCP618T-I/SL 数据手册

 浏览型号MCP618T-I/SL的Datasheet PDF文件第4页浏览型号MCP618T-I/SL的Datasheet PDF文件第5页浏览型号MCP618T-I/SL的Datasheet PDF文件第6页浏览型号MCP618T-I/SL的Datasheet PDF文件第8页浏览型号MCP618T-I/SL的Datasheet PDF文件第9页浏览型号MCP618T-I/SL的Datasheet PDF文件第10页 
MCP616/7/8/9  
2.0  
TYPICAL PERFORMANCE CURVES  
Note:  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
Note: Unless otherwise indicated, VDD = +2.3V to +5.5V, VSS = GND, TA = +25°C, VCM = VDD/2, VOUT VDD/2,  
RL = 100 kto VDD/2 and CL = 60 pF.  
20%  
14%  
598 Samples  
VDD = 5.5V  
598 Samples  
VDD = 5.5V  
18%  
16%  
14%  
12%  
10%  
8%  
12%  
10%  
8%  
TA = -40°C to +85°C  
6%  
4%  
6%  
4%  
2%  
2%  
0%  
0%  
Input Offset Voltage (µV)  
Input Offset Voltage Drift (µV/°C)  
FIGURE 2-1:  
Input Offset Voltage at  
FIGURE 2-4:  
Input Offset Voltage Drift at  
V
= 5.5V.  
V
= 5.5V.  
DD  
DD  
18%  
16%  
598 Samples  
VDD = 2.3V  
A = -40°C to +85°C  
598 Samples  
DD = 2.3V  
16%  
14%  
12%  
10%  
8%  
14%  
12%  
10%  
8%  
V
T
6%  
6%  
4%  
4%  
2%  
2%  
0%  
0%  
Offset Voltage (µV)  
Input Offset Voltage Drift (µV/°C)  
FIGURE 2-2:  
Input Offset Voltage at  
FIGURE 2-5:  
Input Offset Voltage Drift at  
V
= 2.3V.  
V
= 2.3V.  
DD  
DD  
16%  
20%  
600 Samples  
DD = 5.5V  
600 Samples  
VDD = 5.5V  
18%  
16%  
14%  
12%  
10%  
8%  
6%  
4%  
2%  
14%  
12%  
10%  
8%  
V
6%  
4%  
2%  
0%  
0%  
Input Bias Current (nA)  
Input Offset Current (nA)  
FIGURE 2-3:  
= 5.5V.  
Input Bias Current at  
FIGURE 2-6:  
V = 5.5V.  
DD  
Input Offset Current at  
V
DD  
© 2008 Microchip Technology Inc.  
DS21613C-page 7  

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