MCP6001/1R/1U/2/4
1 MHz, Low-Power Op Amp
Description
Features
• Available in SC-70-5 and SOT-23-5 packages
• Gain Bandwidth Product: 1 MHz (typical)
• Rail-to-Rail Input/Output
The Microchip Technology Inc. MCP6001/2/4 family of
operational amplifiers (op amps) is specifically
designed for general-purpose applications. This family
has a 1 MHz Gain Bandwidth Product (GBWP) and 90°
phase margin (typical). It also maintains 45° phase
margin (typical) with a 500 pF capacitive load. This
family operates from a single supply voltage as low as
1.8V, while drawing 100 µA (typical) quiescent current.
Additionally, the MCP6001/2/4 supports rail-to-rail input
and output swing, with a common mode input voltage
range of VDD + 300 mV to VSS – 300 mV. This family of
op amps is designed with Microchip’s advanced CMOS
process.
• Supply Voltage: 1.8V to 6.0V
• Supply Current: IQ = 100 µA (typical)
• Phase Margin: 90° (typical)
• Temperature Range:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
• Available in Single, Dual and Quad Packages
Applications
The MCP6001/2/4 family is available in the industrial
and extended temperature ranges, with a power supply
range of 1.8V to 6.0V.
• Automotive
• Portable Equipment
• Photodiode Amplifier
• Analog Filters
Package Types
MCP6001R
MCP6001
• Notebooks and PDAs
• Battery-Powered Systems
SOT-23-5
SC70-5, SOT-23-5
V
V
V
1
5
4
V
SS
OUT
1
2
3
5
DD
OUT
Design Aids
V
V
2
3
DD
SS
+
-
-
V
+
V
–
IN
V
V –
IN
IN
• SPICE Macro Models
• FilterLab® Software
4
IN
MCP6002
PDIP, SOIC, MSOP
MCP6001U
• Mindi™ Circuit Designer & Simulator
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
SOT-23-5
V
V
V
+
V
5
8
7
6
5
V
V
1
2
3
4
1
DD
IN
OUTA
DD
+
V
V
–
+
2
3
-
SS
–
INA
+
OUTB
-
V
OUT
V
4
+
-
V
V
–
IN
INA
V
INB
Typical Application
+
SS
INB
VDD
MCP6002
MCP6004
VIN
PDIP, SOIC, TSSOP
2x3 DFN *
+
V
V
VOUT
MCP6001
14
13
12
11
1
2
3
4
OUTA
OUTD
V
1
8
7
V
OUTA
DD
–
V
–
+
V
V
V
–
+ -
INA
- +
IND
V
V
–
2
OUTB
EP
9
INA
V
+
INA
V
IND
VSS
V
+
V
V
–
3
4
6
5
INA
INB
DD
+
SS
V
+
SS
INB
V
V
V
V
V
+
10
9
5
6
7
INB
INC
R1
-
-
+
+
R2
–
–
INB
INC
R1
Gain = 1 + -----
R2
V
8
OUTB
OUTC
VREF
* Includes Exposed Thermal Pad (EP); see Table 3-1.
Non-Inverting Amplifier
© 2009 Microchip Technology Inc.
DS21733J-page 1