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MCM72JG64SG66 PDF预览

MCM72JG64SG66

更新时间： 2024-09-29 22:11:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
16页 299K
描述
256KB and 512KB Pipelined BurstRAM Secondary Cache Module for Pentium

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中文翻译

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MCM72JG64SG66 技术参数

生命周期：ObsoleteReach Compliance Code：unknown
ECCN代码：3A991.B.2.AHTS代码：8542.32.00.41
风险等级：5.84最长访问时间：7 ns
其他特性：BYTE WRITE; BURST COUNTER; OUTPUT REGISTERJESD-30 代码：R-XDMA-N160
内存密度：4194304 bit内存集成电路类型：CACHE TAG SRAM MODULE
功能数量：1端口数量：1
端子数量：160字数：65536 words
字数代码：64000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：64KX64输出特性：SERIES-RESISTOR
可输出：YES封装主体材料：UNSPECIFIED
封装形状：RECTANGULAR封装形式：MICROELECTRONIC ASSEMBLY
并行/串行：PARALLEL认证状态：Not Qualified
最大供电电压 (Vsup)：5.25 V最小供电电压 (Vsup)：4.75 V
标称供电电压 (Vsup)：5 V表面贴装：NO
技术：BICMOS温度等级：COMMERCIAL
端子形式：NO LEAD端子位置：DUAL
Base Number Matches：1

MCM72JG64SG66 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
MCM72JG32  
MCM72JG64  
Advance Information  
256K and 512K Pipelined  
BurstRAM Sedcondary Cache  
Module for Pentium  
160–LEAD CARD  
EDGE  
CASE 1113A–01  
TOP VIEW  
The MCM72JG32 and MCM72JG64 are designed to provide a burstable, high  
performance, 256K/512K L2 cache for the Pentium microprocessor in conjunc-  
tion with Intel’s Triton chip set. The modules are configured as 32K x 64 and  
64K x 64 bits in a 160 pin card edge memory module. Each module uses four of  
Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and one Motorola 5 V 32K x 8  
FSRAM for the tag RAM.  
1
Bursts can be initiated with either address status processor (ADSP) or cache  
address status (CADS). Subsequent burst addresses are generated internal to  
the BurstRAM by the cache burst advance (CADV) input pin.  
Write cycles are internally self timed and are initiated by the rising edge of the  
clock (CLK0, CLK1) input. Eight write enables are provided for byte write control.  
PD0 – PD4 map into the Triton chip set for auto–configuration of the cache  
control.  
Module family pinout supports 5 V and 3.3 V components. It is recommended  
that all power supplies be connected.  
These cache modules are plug and pin compatible with the  
MCM64AF32SG15, a 256K byte asynchronous module also designed for the  
Pentium microprocessor in conjunction with Intel’s Triton chip set.  
42  
43  
•
•
•
•
•
•
•
•
•
Pentium–Style Burst Counter on Chip  
Pipelined Data Out  
160 Pin Card Edge Module  
Address Pipeline Supported by ADSP Disabled with Ex  
All Cache Data and Tag I/Os are TTL Compatible  
Three State Outputs  
Byte Write Capability  
80  
Fast Module Clock Rates: 66 MHz  
Fast SRAM Access Times:15 ns for Tag RAM  
9 ns for Data RAMs  
•
•
Decoupling Capacitors for Each Fast Static RAM  
High Quality Multi–Layer FR4 PWB with Separate Power and Ground  
Planes  
•
•
•
I/Os are 3.3 V Compatible on Data RAMs  
Burndy Connector, Part Number: CELP2X80SC3Z48  
Series 20 Ω Resistors for Noise Immunity  
BurstRAM is a trademark of Motorola.  
Pentium is a trademark of Intel Corp.  
This document contains information on a new product. Motorola reserves the right to change or discontinue this product without notice.  
REV 1  
5/95  
Motorola, Inc. 1995  
1234567...16

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