Datasheet > MCM64Z834TQ100

MCM64Z834TQ100

更新时间： 2024-11-21 05:49:03

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		静态存储器
页数	文件大小	规格书
32页	357K
描述
256KX36 ZBT SRAM, 5ns, PQFP100, TQFP-100

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MCM64Z834TQ100 数据手册

Order this document

by MCM64Z834/D

SEMICONDUCTOR TECHNICAL DATA

MCM64Z834

MCM64Z916

Product Proposal

256K x 36 and 512K x 18 Bit

Pipelined ZBT RAM

Synchronous Fast Static RAM

The ZBT RAM is an 8M–bit synchronous fast static RAM designed to provide

Zero Bus Turnaround . The ZBT RAM allows 100% use of bus cycles during

back–to–back read/write and write/read cycles. The MCM64Z834 (organized as

256K words by 36 bits) and the MCM64Z916 (organized as 512K words by 18

bits) are fabricated in Motorola’s high performance silicon gate CMOS tech-

nology. This device integrates input registers, an output register, a 2–bit address

counter, and high speed SRAM onto a single monolithic circuit for reduced parts

count in communication applications. Synchronous design allows precise cycle

control with the use of an external positive–edge–triggered clock (CK). CMOS

circuitry reduces the overall power consumption of the integrated functions for

greater reliability.

TQ PACKAGE

TQFP

CASE 983A–01

ZP PACKAGE

PBGA

CASE 999–02

Addresses (SA), data inputs (DQ), and all control signals except output enable

(G), sleep mode (ZZ), and linear burst order (LBO) are clock (CK) controlled

through positive–edge–triggered noninverting registers.

Write cycles are internally self–timed and are initiated by the rising edge of the

clock (CK) input. This feature eliminates complex off–chip write pulse generation

and provides increased timing flexibility for incoming signals.

Forreadcycles, pipelinedSRAMoutputdataistemporarilystoredbyanedge–

triggered output register and then released to the output buffers at the next rising

edge of clock (CK).

•

2.5 V LVTTL and LVCMOS Compatible

MCM64Z834/916–143 = 4 ns Access/7 ns Cycle (143 MHz)

MCM64Z834/916–133 = 4.2 ns Access/7.5 ns Cycle (133 MHz)

MCM64Z834/916–100 = 5 ns Access/10 ns Cycle (100 MHz)

Selectable Burst Sequencing Order (Linear/Interleaved)

Internally Self–Timed Write Cycle

Sleep Mode (ZZ)

Two–Cycle Deselect

Byte Write Control

ADV Controlled Burst

•

IEEE 1149–1 Sample Only JTAG

100–Pin TQFP and 119–Bump PBGA Packages

ZBT and Zero Bus Turnaround are trademarks of Integrated Device Technology, Inc., and the architecture is supported by

Micron Technology, Inc. and Motorola, Inc.

This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.

REV 1

6/3/99

Motorola, Inc. 1999

MOTOROLA FAST SRAM

MCM64Z834•MCM64Z916

12 3 4 5 6 7...32

中文翻译

下载PDF

与MCM64Z834TQ100相关器件

型号	品牌	获取价格	描述	数据表
MCM64Z834TQ100R	MOTOROLA	获取价格	ZBT SRAM, 256KX36, 5ns, CMOS, PQFP100, TQFP-100
MCM64Z834TQ10R	FREESCALE	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM64Z834TQ10R	NXP	获取价格	256KX36 ZBT SRAM, 10ns, PQFP100, TQFP-100
MCM64Z834TQ11	FREESCALE	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM64Z834TQ11	NXP	获取价格	256KX36 ZBT SRAM, 11ns, PQFP100, TQFP-100
MCM64Z834TQ11R	FREESCALE	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM
MCM64Z834TQ11R	NXP	获取价格	256KX36 ZBT SRAM, 11ns, PQFP100, TQFP-100
MCM64Z834TQ133	MOTOROLA	获取价格	ZBT SRAM, 256KX36, 4.2ns, CMOS, PQFP100, TQFP-100
MCM64Z834TQ143R	MOTOROLA	获取价格	256KX36 ZBT SRAM, 4ns, PQFP100, TQFP-100
MCM64Z834TQ15	FREESCALE	获取价格	256K x 36 and 512K x 18 Bit ZBT Fast Static RAM

与MCM64Z834TQ100相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

25
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

17
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

49
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

46

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM64Z834TQ100

MCM64Z834TQ100 数据手册

与MCM64Z834TQ100相关器件

与MCM64Z834TQ100相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

MCM64Z834TQ100

MCM64Z834TQ100 数据手册

与MCM64Z834TQ100相关器件

与MCM64Z834TQ100相关文章

您还可以找

您在本页遇到什么问题？