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MC74VHC1G07DFT4 PDF预览

MC74VHC1G07DFT4

更新时间: 2024-02-28 09:02:39
品牌 Logo 应用领域
ETL 触发器逻辑集成电路光电二极管
页数 文件大小 规格书
4页 577K
描述
Noninverting Buffer with Open Drain Output

MC74VHC1G07DFT4 技术参数

生命周期:Contact Manufacturer包装说明:SC-70, 5 PIN
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.76系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G5负载电容(CL):50 pF
逻辑集成电路类型:BUFFER最大I(ol):0.008 A
功能数量:1输入次数:1
端子数量:5最高工作温度:125 °C
最低工作温度:-55 °C输出特性:OPEN-DRAIN
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:TSSOP5/6,.08封装形状:RECTANGULAR
封装形式:SMALL OUTLINE电源:2/5.5 V
Prop。Delay @ Nom-Sup:10 ns传播延迟(tpd):14.5 ns
认证状态:Not Qualified施密特触发器:NO
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
Base Number Matches:1

MC74VHC1G07DFT4 数据手册

 浏览型号MC74VHC1G07DFT4的Datasheet PDF文件第2页浏览型号MC74VHC1G07DFT4的Datasheet PDF文件第3页浏览型号MC74VHC1G07DFT4的Datasheet PDF文件第4页 
Noninverting Buffer with  
Open Drain Output  
MC74VHC1G07  
The MC74VHC1G07 is an advanced high speed CMOS buffer with open drain output fabricated with silicon gate CMOS technology. It  
achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.  
The internal circuit is composed of three stages, including a buffer and an open drain output which provides the capability to set the  
output switching level. This allows the MC74VHC1G07 to be used to interface 5 V circuits to circuits of any voltage between V CC and 7 V  
using an external resistor and power supply.  
The MC74VHC1G07 input structure provides protection when voltages up to 7 V are applied, regardless of the supply voltage.  
• High Speed: t PD = 3.8 ns (Typ) at V CC = 5 V  
• Low Internal Power Dissipation: I CC = 2 mA (Max) at T A = 25°C  
• Power Down Protection Provided on Inputs  
• Pin and Function Compatible with Other Standard Logic Families  
• Chip Complexity: FET = 105; Equivalent Gate = 26  
MARKING DIAGRAMS  
5
4
1
2
V7d  
3
SC–88A / SOT–353/SC–70  
DF SUFFIX  
CASE 419A  
Pin 1  
d = Date Code  
5
Figure 1. Pinout (Top View)  
4
V7d  
1
2
3
Figure 2. Logic Symbol  
TSOP–5/SOT–23/SC–59  
DT SUFFIX  
CASE 483  
Pin 1  
d = Date Code  
FUNCTION TABLE  
Inputs  
Output  
PIN ASSIGNMENT  
A
L
Y
L
Z
1
2
3
4
5
NC  
IN A  
H
GND  
OUT Y  
V CC  
ORDERING INFORMATION  
See detailed ordering and shipping information in the  
package dimensions section on page 4 of this data sheet.  
VH7–1/4  

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