5秒后页面跳转
MC74LVX573DTG PDF预览

MC74LVX573DTG

更新时间: 2024-02-24 11:42:09
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 117K
描述
Octal D-Type Latch with 3-State Outputs

MC74LVX573DTG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.09
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.004 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:14.5 ns传播延迟(tpd):22 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

MC74LVX573DTG 数据手册

 浏览型号MC74LVX573DTG的Datasheet PDF文件第2页浏览型号MC74LVX573DTG的Datasheet PDF文件第3页浏览型号MC74LVX573DTG的Datasheet PDF文件第4页浏览型号MC74LVX573DTG的Datasheet PDF文件第5页浏览型号MC74LVX573DTG的Datasheet PDF文件第6页浏览型号MC74LVX573DTG的Datasheet PDF文件第7页 
MC74LVX573  
Octal D-Type Latch  
with 3-State Outputs  
With 5 V−Tolerant Inputs  
The MC74LVX573 is an advanced high speed CMOS octal latch  
with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing  
the interface of 5.0 V systems to 3.0 V systems.  
http://onsemi.com  
This 8−bit D−type latch is controlled by a latch enable input and an  
output enable input. When the output enable input is high, the eight  
outputs are in a high impedance state.  
SOIC−20  
DW SUFFIX  
CASE 751D  
TSSOP−20  
DT SUFFIX  
CASE 948E  
Features  
High Speed: t = 6.4 ns (Typ) at V = 3.3 V  
PD  
CC  
Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
PIN ASSIGNMENT  
CC  
A
Power Down Protection Provided on Inputs  
V
O0 O1 O2 O3 O4 O5 O6 O7 LE  
CC  
Balanced Propagation Delays  
20 19 18 17 16 15 14  
12  
13  
11  
Low Noise: V  
= 0.8 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: Human Body Model > 2000 V;  
1
2
3
4
5
6
7
9
8
10  
Machine Model > 200 V  
OE D0 D1 D2 D3 D4 D5 D6 D7 GND  
These Devices are Pb−Free and are RoHS Compliant  
20−Lead (Top View)  
MARKING DIAGRAMS  
20  
1
20  
1
LVX  
573  
LVX573  
AWLYYWWG  
ALYWG  
G
SOIC−20  
TSSOP−20  
LVX573  
A
WL, L  
Y
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
= Year  
WW, W  
G or G  
= Work Week  
= Pb−Free Package  
(Note: Microdot may be in either location)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 5 of this data sheet.  
© Semiconductor Components Industries, LLC, 2014  
1
Publication Order Number:  
August, 2014 − Rev. 5  
MC74LVX573/D  

MC74LVX573DTG 替代型号

型号 品牌 替代类型 描述 数据表
74LVX573MTCX ONSEMI

完全替代

具有三态输出的低压八路锁存
MC74LVX573DTR2G ONSEMI

完全替代

Octal D-Type Latch with 3-State Outputs
MC74LVX573DTR2 ONSEMI

完全替代

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs

与MC74LVX573DTG相关器件

型号 品牌 获取价格 描述 数据表
MC74LVX573DTR2 ONSEMI

获取价格

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs
MC74LVX573DTR2 MOTOROLA

获取价格

8-BIT DRIVER, PDSO20, PLASTIC, TSSOP-20
MC74LVX573DTR2G ONSEMI

获取价格

Octal D-Type Latch with 3-State Outputs
MC74LVX573DW MOTOROLA

获取价格

LOW-VOLTAGE CMOS
MC74LVX573DW ONSEMI

获取价格

LOW-VOLTAGE CMOS
MC74LVX573DWR2 ONSEMI

获取价格

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs
MC74LVX573DWR2 MOTOROLA

获取价格

Bus Driver, 1-Func, 8-Bit, PDSO20, PLASTIC, SOIC-20
MC74LVX573DWR2 ROCHESTER

获取价格

LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, SOIC-20
MC74LVX573DWR2G ONSEMI

获取价格

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs
MC74LVX573M ONSEMI

获取价格

LOW-VOLTAGE CMOS