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MC74LVX573MEL PDF预览

MC74LVX573MEL

更新时间: 2024-02-29 18:33:30
品牌 Logo 应用领域
安森美 - ONSEMI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
8页 102K
描述
Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs

MC74LVX573MEL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:LEAD FREE, EIAJ, SO-20
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.6Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.575 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.004 A位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:RAIL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:14.5 ns
传播延迟(tpd):22 ns认证状态:Not Qualified
座面最大高度:2.05 mm子类别:FF/Latches
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:5.275 mm
Base Number Matches:1

MC74LVX573MEL 数据手册

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MC74LVX573  
Octal D−Type Latch  
with 3−State Outputs  
With 5 V−Tolerant Inputs  
The MC74LVX573 is an advanced high speed CMOS octal latch  
with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing  
the interface of 5.0 V systems to 3.0 V systems.  
This 8−bit D−type latch is controlled by a latch enable input and an  
output enable input. When the output enable input is high, the eight  
outputs are in a high impedance state.  
http://onsemi.com  
MARKING  
DIAGRAMS  
20  
Features  
LVX573  
AWLYYWW  
High Speed: t = 6.4 ns (Typ) at V = 3.3 V  
PD  
CC  
Low Power Dissipation: I = 4 mA (Max) at T = 25°C  
CC  
A
SOIC−20  
DW SUFFIX  
CASE 751D  
Power Down Protection Provided on Inputs  
Balanced Propagation Delays  
1
Low Noise: V  
= 0.8 V (Max)  
OLP  
Pin and Function Compatible with Other Standard Logic Families  
Latchup Performance Exceeds 300 mA  
ESD Performance: Human Body Model > 2000 V;  
Machine Model > 200 V  
LVX  
573  
ALYW  
Pb−Free Packages are Available*  
TSSOP−20  
DT SUFFIX  
CASE 948E  
V
O0  
19  
O1  
18  
O2  
17  
O3  
16  
O4  
15  
O5  
14  
O6  
13  
O7  
12  
LE  
11  
CC  
LVX573  
AWLYWW  
20  
SOEIAJ−20  
M SUFFIX  
CASE 967  
A
= Assembly Location  
= Year  
1
2
3
4
5
6
7
9
8
10  
WL, L = Wafer Lot  
Y, YY  
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7 GND  
W, WW = Work Week  
Figure 1. 20−Lead Pinout (Top View)  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
March, 2005 − Rev. 3  
MC74LVX573/D  

MC74LVX573MEL 替代型号

型号 品牌 替代类型 描述 数据表
MC74LVX573MG ONSEMI

完全替代

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs
MC74LVX573MELG ONSEMI

完全替代

Octal D-Type Latch with 3-State Outputs With 5 V−Tolerant Inputs
MC74LVX573M ONSEMI

完全替代

LOW-VOLTAGE CMOS

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