Datasheet > MC74LVX125

MC74LVX125

更新时间： 2024-09-30 22:15:07

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
6页	151K
描述
LOW-VOLTAGE CMOS

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

MC74LVX125 数据手册

SEMICONDUCTOR TECHNICAL DATA

The MC74LVX125 is an advanced high speed CMOS quad bus buffer.

The inputs tolerate voltages up to 7V, allowing the interface of 5V systems

to 3V systems.

The MC74LVX125 requires the 3–state control input (OE) to be set

High to place the output into the high impedance state.

LOW–VOLTAGE CMOS

• High Speed: t

= 4.4ns (Typ) at V

= 3.3V

• Low Power Dissipation: I

= 4µA (Max) at T = 25°C

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Low Noise: V

= 0.5V (Max)

OLP

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

D SUFFIX

14–LEAD SOIC PACKAGE

CASE 751A–03

• ESD Performance: HBM > 2000V; Machine Model > 200V

OE3

OE2

DT SUFFIX

14–LEAD TSSOP PACKAGE

CASE 948G–01

OE0

OE1

GND

M SUFFIX

14–LEAD SOIC EIAJ PACKAGE

CASE 965–01

Figure 1. 14–Lead Pinout (Top View)

OE0

OE2

PIN NAMES

Pins

Function

OEn

Output Enable Inputs

Data Inputs

3–State Outputs

OE1

OE3

FUNCTION TABLE

INPUTS

Figure 2. Logic Diagram

OUTPUTS

OEn

H = High Voltage Level; L = Low VoltageLevel;Z=HighImped-

ance State; X = High or Low Voltage Level and Transitions Are

Acceptable, for I

reasons, DO NOT FLOAT Inputs

6/97

Motorola, Inc. 1997

REV 0

12 3 4 5 6

中文翻译

下载PDF

与MC74LVX125相关器件

型号	品牌	获取价格	描述	数据表
MC74LVX125_11	ONSEMI	获取价格	Quad Bus Buffer
MC74LVX125_14	ONSEMI	获取价格	Quad Bus Buffer
MC74LVX125D	MOTOROLA	获取价格	LOW-VOLTAGE CMOS
MC74LVX125D	ONSEMI	获取价格	LOW-VOLTAGE CMOS
MC74LVX125DG	ONSEMI	获取价格	Quad Bus Buffer
MC74LVX125DR2G	ONSEMI	获取价格	Quad Bus Buffer
MC74LVX125DT	MOTOROLA	获取价格	LOW-VOLTAGE CMOS
MC74LVX125DT	ONSEMI	获取价格	LOW-VOLTAGE CMOS
MC74LVX125DTG	ONSEMI	获取价格	Quad Bus Buffer
MC74LVX125DTR2	MOTOROLA	获取价格	LV/LV-A/LVX/H SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, PLASTIC, TSSOP-14