Datasheet > MC74LV594ADR2G

MC74LV594ADR2G

更新时间： 2024-11-22 11:10:55

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
13页	271K
描述
8-Bit Shift Register with Output Register

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数据手册

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MC74LV594ADR2G 数据手册

MC74LV594A

8-Bit Shift Register with

Output Register

The MC74LV594A is an 8−bit shift register designed for

2 V to 6.0 V V_CCoperation. The device contain an 8−bit serial−in,

parallel−out shift register that feeds an 8−bit D−type storage register.

Separate clocks (RCLK, SRCLK) and direct overriding clear (RCLR,

SRCLR) inputs are provided on the shift and storage registers. A serial

output (Q_H’) is provided for cascading purposes.

The shift−register (SRCLK) and storage−register (RCLK) clocks

are positive−edge triggered. If the clocks are tied together, the shift

www.onsemi.com

MARKING

DIAGRAMS

SOIC−16

D SUFFIX

CASE 751B

LV594AG

AWLYWW

Features

• 2.0 V to 6.0 V V Operation

• Low Input Current: 1.0 mA

TSSOP−16

DT SUFFIX

CASE 948F

594A

ALYWG

• Max t of 6.5 ns at 5 V

• Typical V

(Output Ground Bounce) < 0.8 V

OLP

at V = 3.3 V, T = 25°C

• Typical V

(Output V Undershoot) > 2.3 V

WL, L

YY, Y

= Assembly Location

= Wafer Lot

= Year

OHV

at V = 3.3 V, T = 25°C

• Support Mixed−Mode Voltage Operation on All Ports

• 8−Bit Serial−In, Parallel−Out Shift Registers With Storage

• Independent Direct Overriding Clears on Shift and Storage Registers

• Independent Clocks for Shift and Storage Registers

WW, W = Work Week

G or G

= Pb−Free Package

(Note: Microdot may be in either location)

PIN ASSIGNMENT

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

SER

RCLR

SRCLR

GND

H’

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

Publication Order Number:

May, 2018 − Rev. 2

MC74LV594A/D

12 3 4 5 6 7...13

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