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MC74LCX374_05

更新时间: 2024-11-05 05:22:11
品牌 Logo 应用领域
安森美 - ONSEMI 触发器
页数 文件大小 规格书
8页 94K
描述
Low-Voltage CMOS Octal D-Type Flip-Flop With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)

MC74LCX374_05 数据手册

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MC74LCX374  
Low−Voltage CMOS  
Octal D−Type Flip−Flop  
With 5 V−Tolerant Inputs and Outputs  
(3−State, Non−Inverting)  
http://onsemi.com  
MARKING  
The MC74LCX374 is a high performance, non−inverting octal  
D−type flip−flop operating from a 2.3 to 3.6 V supply. High  
impedance TTL compatible inputs significantly reduce current  
loading to input drivers while TTL compatible outputs offer improved  
DIAGRAMS  
switching noise performance. A V specification of 5.5 V allows  
I
20  
SOIC−20  
DW SUFFIX  
CASE 751D  
MC74LCX374 inputs to be safely driven from 5 V devices.  
The MC74LCX374 consists of 8 edge−triggered flip−flops with  
individual D−type inputs and 3−state true outputs. The buffered clock  
and buffered Output Enable (OE) are common to all flip−flops. The  
eight flip−flops will store the state of individual D inputs that meet the  
setup and hold time requirements on the LOW−to−HIGH Clock (CP)  
transition. With the OE LOW, the contents of the eight flip−flops are  
available at the outputs. When the OE is HIGH, the outputs go to the  
high impedance state. The OE input level does not affect the operation  
of the flip−flops.  
LCX374  
AWLYYWW  
20  
1
1
20  
LCX  
374  
ALYW  
TSSOP−20  
DT SUFFIX  
CASE 948E  
20  
1
Features  
1
Designed for 2.3 to 3.6 V V Operation  
CC  
5 V Tolerant − Interface Capability With 5 V TTL Logic  
Supports Live Insertion and Withdrawal  
20  
SOEIAJ−20  
M SUFFIX  
CASE 967  
1
74LCX374  
AWLYWW  
I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
LVTTL Compatible  
LVCMOS Compatible  
20  
1
24 mA Balanced Output Sink and Source Capability  
Near Zero Static Supply Current in All Three Logic States (10 mA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds 500 mA  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
= Year  
ESD Performance:  
Human Body Model >2000 V  
Machine Model >200 V  
W, WW = Work Week  
Pb−Free Packages are Available*  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 3 of this data sheet.  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
January, 2005 − Rev. 7  
MC74LCX374/D  

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