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MC74HC85 PDF预览

MC74HC85

更新时间: 2024-01-19 09:41:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 比较器
页数 文件大小 规格书
8页 222K
描述
4-Bit Magnitude Comparator

MC74HC85 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP16,.3Reach Compliance Code:unknown
风险等级:5.91JESD-30 代码:R-PDIP-T16
JESD-609代码:e0逻辑集成电路类型:MAGNITUDE COMPARATOR
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
电源:2/6 V认证状态:Not Qualified
子类别:Arithmetic Circuits表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC74HC85 数据手册

 浏览型号MC74HC85的Datasheet PDF文件第2页浏览型号MC74HC85的Datasheet PDF文件第3页浏览型号MC74HC85的Datasheet PDF文件第4页浏览型号MC74HC85的Datasheet PDF文件第5页浏览型号MC74HC85的Datasheet PDF文件第6页浏览型号MC74HC85的Datasheet PDF文件第7页 
SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC74HC85 is identical in pinout and function to the LS85. This device  
is similar in function to the MM74C85 and L85, but has a different pinout. The  
device inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
16  
1
This 4–Bit Magnitude Comparator compares two 4–bit nibbles and gives a  
high voltage level on either the A > B , A = B , or A < B  
the other two at a low voltage level. This device also has A > B , A = B , and  
A < B inputs, eliminating the need for external gates when cascading.  
in  
output, leaving  
out out  
out  
DT SUFFIX  
TSSOP PACKAGE  
CASE 948F–01  
16  
in in  
1
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
ORDERING INFORMATION  
MC74HCXXN  
MC74HCXXDT  
Plastic  
TSSOP  
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
Chip Complexity: 248 FETs or 62 Equivalent Gates  
PIN ASSIGNMENT  
B3  
1
2
16  
15  
V
CC  
A
B
A3  
in  
LOGIC DIAGRAM  
A = B  
3
4
14  
13  
B2  
A2  
in  
A
B
in  
10  
A0  
A
B
5
6
12  
11  
A1  
B1  
out  
out  
out  
12  
A1  
13  
A2  
A = B  
A
B
7
8
10  
9
A0  
B0  
15  
A3  
DATA  
INPUTS  
GND  
5
A > B  
out  
COMPARISON  
OUTPUTS  
9
6
7
B0  
B1  
B2  
B3  
A = B  
A < B  
out  
out  
11  
14  
1
4
3
2
A > B  
in  
in  
in  
CASCADING  
INPUTS  
A = B  
A < B  
PIN 16 = V  
CC  
PIN 8 = GND  
10/95  
REV 6  
Motorola, Inc. 1995  

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