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MC74HC86ADR2 PDF预览

MC74HC86ADR2

更新时间: 2024-11-19 23:01:35
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路石英晶振光电二极管
页数 文件大小 规格书
8页 162K
描述
Quad 2-Input Exclusive OR Gate

MC74HC86ADR2 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOIC-14
针数:14Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:7.03Is Samacsys:N
系列:HC/UHJESD-30 代码:R-PDSO-G14
JESD-609代码:e0长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:XOR GATE
最大I(ol):0.004 A湿度敏感等级:1
功能数量:4输入次数:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):235
电源:2/6 VProp。Delay @ Nom-Sup:31 ns
传播延迟(tpd):150 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

MC74HC86ADR2 数据手册

 浏览型号MC74HC86ADR2的Datasheet PDF文件第2页浏览型号MC74HC86ADR2的Datasheet PDF文件第3页浏览型号MC74HC86ADR2的Datasheet PDF文件第4页浏览型号MC74HC86ADR2的Datasheet PDF文件第5页浏览型号MC74HC86ADR2的Datasheet PDF文件第6页浏览型号MC74HC86ADR2的Datasheet PDF文件第7页 
High–Performance Silicon–Gate CMOS  
The MC74HC86A is identical in pinout to the LS86. The device  
inputs are compatible with standard CMOS outputs; with pullup  
resistors, they are compatible with LSTTL outputs.  
http://onsemi.com  
MARKING  
DIAGRAMS  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
14  
PDIP–14  
N SUFFIX  
CASE 646  
MC74HC86AN  
AWLYYWW  
1
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
14  
SOIC–14  
D SUFFIX  
CASE 751A  
HC86A  
AWLYWW  
Chip Complexity: 56 FETs or 14 Equivalent Gates  
LOGIC DIAGRAM  
1
14  
1
A1  
B1  
3
Y1  
Y2  
Y3  
Y4  
2
HC  
86A  
ALYW  
TSSOP–14  
DT SUFFIX  
CASE 948G  
4
5
A2  
B2  
6
1
Y = A  
B
A
= Assembly Location  
WL or L = Wafer Lot  
YY or Y = Year  
WW or W = Work Week  
= AB + AB  
9
A3  
B3  
8
10  
PIN 14 = V  
CC  
PIN 7 = GND  
12  
13  
FUNCTION TABLE  
A4  
B4  
11  
Inputs  
Output  
A
B
Y
PIN ASSIGNMENT  
L
L
H
H
L
H
L
L
H
H
L
A1  
B1  
1
2
14  
13 B4  
12  
V
CC  
H
Y1  
A2  
3
4
A4  
11 Y4  
10 B3  
B2  
Y2  
5
6
7
9
8
A3  
Y3  
ORDERING INFORMATION  
GND  
Device  
Package  
PDIP–14  
Shipping  
MC74HC86AN  
2000 / Box  
55 / Rail  
MC74HC86AD  
SOIC–14  
SOIC–14  
TSSOP–14  
TSSOP–14  
MC74HC86ADR2  
MC74HC86ADT  
MC74HC86ADTR2  
2500 / Reel  
96 / Rail  
2500 / Reel  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
March, 2000 – Rev. 2  
MC74HC86A/D  

MC74HC86ADR2 替代型号

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