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MC74HC4067ADTR2G PDF预览

MC74HC4067ADTR2G

更新时间: 2024-11-25 01:10:51
品牌 Logo 应用领域
安森美 - ONSEMI 光电二极管
页数 文件大小 规格书
12页 131K
描述
Quad Analog Switch/ Multiplexer/Demultiplexer

MC74HC4067ADTR2G 技术参数

是否无铅: 不含铅生命周期:Active
零件包装代码:TSSOP包装说明:TSSOP, TSSOP24,.25
针数:24Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:4 weeks
风险等级:1.66模拟集成电路 - 其他类型:SPST
JESD-30 代码:R-PDSO-G24长度:7.8 mm
湿度敏感等级:1信道数量:1
功能数量:4端子数量:24
标称断态隔离度:65 dB通态电阻匹配规范:10 Ω
最大通态电阻 (Ron):160 Ω最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:2/6 V认证状态:Not Qualified
座面最大高度:1.2 mm最大信号电流:0.025 A
子类别:Multiplexer or Switches最大供电电流 (Isup):0.08 mA
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
最长接通时间:23 ns技术:CMOS
温度等级:MILITARY端子面层:Nickel/Gold/Palladium (Ni/Au/Pd)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:4.4 mm

MC74HC4067ADTR2G 数据手册

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MC74HC4067A  
Quad Analog Switch/  
Multiplexer/Demultiplexer  
High−Performance Silicon−Gate CMOS  
The MC74HC4067A utilizes silicon−gate CMOS technology to  
achieve fast propagation delays, low ON resistances, and low  
OFF−channel leakage current. This bilateral switch/  
multiplexer/demultiplexer controls analog and digital voltages that  
www.onsemi.com  
MARKING  
DIAGRAMS  
may vary across the full power−supply range (from V to GND).  
CC  
The ON/OFF control inputs are compatible with standard CMOS  
outputs; with pullup resistors, they are compatible with LSTTL outputs.  
For analog switches with voltage−level translators, see the HC4316A.  
24  
HC4067AG  
AWLYWW  
SOIC−24  
DW SUFFIX  
CASE 751E  
24  
1
Features  
1
Fast Switching and Propagation Speeds  
High ON/OFF Output Voltage Ratio  
Low Crosstalk Between Switches  
Diode Protection on All Inputs/Outputs  
24  
TSSOP−24  
DT SUFFIX  
CASE 948H  
HC  
4067AG  
ALYW  
24  
Wide Power−Supply Voltage Range (V − GND) = 2.0 to 6.0 V  
CC  
1
Analog Input Voltage Range (V − GND) = 0 to 6.0 V  
CC  
1
Improved Linearity and Lower ON Resistance over Input Voltage  
Low Noise  
A
L, WL  
Y, YY  
= Assembly Location  
= Wafer Lot  
NLV Prefix for Automotive and Other Applications Requiring  
Unique Site and Control Change Requirements; AEC−Q100  
Qualified and PPAP Capable  
= Year  
W, WW = Work Week  
= Pb−Free Package  
G
(Note: Microdot may be in either location)  
These are Pb−Free Devices  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 10 of this data sheet.  
© Semiconductor Components Industries, LLC, 2015  
1
Publication Order Number:  
May, 2015 − Rev. 2  
MC74HC4067A/D  

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