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MC74HC242N PDF预览

MC74HC242N

更新时间: 2024-11-24 23:01:35
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 总线收发器
页数 文件大小 规格书
5页 122K
描述
Quad 3-State Bus Transceiver

MC74HC242N 数据手册

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
The MC74HC242 is identical in pinout to the LS242. The device inputs  
are compatible with Standard CMOS outputs; with pullup resistors, they  
are compatible with LSTTL outputs.  
N SUFFIX  
PLASTIC PACKAGE  
CASE 646–06  
14  
This quad bus transceiver is designed for asynchronous two–way  
communications between data buses. The states of the Output Enables  
(A–to–B Enable and B–to–A Enable) determine both the direction of data  
flow (from A to B or from B to A) and the modes of the Data Ports (input,  
output, or high–impedance).  
1
ORDERING INFORMATION  
MC74HCXXXN Plastic  
Output Drive Capability: 15 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS and TTL  
Operating Voltage Range: 2 to 6V  
FUNCTION TABLE  
Control Inputs  
A–to–B B–to–A  
Data Port Status  
Low Input Current: 1µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance With the JEDEC Standard No. 7A Requirements  
Chip Complexity: 130 FETs or 32.5 Equivalent Gates  
A
B
Enable  
Enable  
H
L
H
H
L
O
Z
Z
I
I
Z
Z
O
H
L
LOGIC DIAGRAM  
L
I = Input; O = Output, O = Inverting Output  
Z = High Impedance  
3
4
5
6
11  
10  
9
A1  
A2  
A3  
A4  
B1  
B2  
B3  
B4  
A Data  
Port  
B Data  
Port  
8
Pin 14 = VCC  
Pin 7 = GND  
Pins 2, 12 = No Connection  
1
A–TO–B ENABLE  
B–TO–A ENABLE  
Output  
EnableS  
13  
Pinout: 14–Lead Plastic Package (Top View)  
B–to–A  
Enable  
V
NC  
12  
B1  
11  
B2  
10  
B3  
9
B4  
8
CC  
14  
13  
1
2
3
4
5
6
7
A–to–B NC  
Enable  
A1  
A2  
A3  
A4  
GND  
NC = No Connection  
10/95  
Motorola, Inc. 1995  
REV 6  

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