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MC74F378 PDF预览

MC74F378

更新时间: 2024-11-06 22:26:55
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA /
页数 文件大小 规格书
3页 63K
描述
PARALLEL D REGISTER WITH ENABLE

MC74F378 数据手册

 浏览型号MC74F378的Datasheet PDF文件第2页浏览型号MC74F378的Datasheet PDF文件第3页 
MC54/74F378  
PARALLEL D REGISTER  
WITH ENABLE  
The MC54/74F378 is a 6-bit register with a buffered common enable. This  
device is similar to the F174 but with common Enable rather than common  
Master Reset.  
The F378 consists of six edge-triggered D-type flip-flops with individual D  
inputs and Q outputs. The Clock (CP) and Enable (E) inputs are common to  
all flip-flops.  
PARALLEL D REGISTER  
WITH ENABLE  
FAST SCHOTTKY TTL  
When the E input is LOW, new data is entered into the register on the LOW-  
to-HIGH transition of the CP input. When the E input is HIGH the register will  
retain the present data independent of the CP input. This circuit is designed  
to prevent false clocking by transitions on the E input..  
J SUFFIX  
CERAMIC  
CASE 620-09  
6-Bit High-Speed Parallel Register  
Positive Edge-Triggered D-Type Inputs  
Fully Buffered Common Clock and Enable Inputs  
Input Clamp Diodes Limit High-Speed Termination Effects  
16  
1
CONNECTION DIAGRAM (TOP VIEW)  
N SUFFIX  
PLASTIC  
CASE 648-08  
V
Q
D
D
Q
D
Q
3
CP  
9
CC  
5
5
4
4
3
16  
16  
15  
14  
13  
12  
11  
10  
1
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
1
2
3
4
5
6
7
8
E
Q
D
D
Q
D
Q
2
GND  
0
0
1
1
2
ORDERING INFORMATION  
MC54FXXXJ  
Ceramic  
FUNCTION TABLE  
MC74FXXXN Plastic  
MC74FXXXD SOIC  
Inputs  
CP  
Output  
E
H
L
D
Q
n
n
X
No Change  
LOGIC SYMBOL  
H
L
H
L
L
14  
D
D
5
4
H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don’t Care  
Q
Q
15  
12  
10  
7
5
4
13  
11  
6
D
D
3
2
Z = High Impedance  
Q
Q
3
2
4
D
D
E
1
0
5
Q
Q
1
0
3
1
2
CP  
9
V
= PIN 16  
CC  
GND = PIN 8  
FAST AND LS TTL DATA  
4-173  

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