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MC74F377 PDF预览

MC74F377

更新时间: 2024-11-20 22:26:55
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 触发器
页数 文件大小 规格书
3页 91K
描述
OCTAL D FLIP-FLOP WITH ENABLE

MC74F377 数据手册

 浏览型号MC74F377的Datasheet PDF文件第2页浏览型号MC74F377的Datasheet PDF文件第3页 
MC74F377  
OCTAL D FLIP-FLOP WITH ENABLE  
The MC74F377 is a high-speed 8-Bit Register. The register consists of  
eight D-Type Flip-Flops with individual D inputs and Q outputs. The common  
buffered clock (CP) input loads all flip-flops simultaneously when the Enable  
(E) is LOW. This device is supplied in a 20-pin package.  
OCTAL D FLIP-FLOP  
WITH ENABLE  
High Impedance NPN Base Inputs for Reduced Loading (20 µA in  
HIGH and LOW States)  
FAST SCHOTTKY TTL  
Ideal for Addressable Register Applications  
Enable for Address and Data Synchronization Applications  
Eight Edge-Triggered D Flip-Flops  
Buffered Common Clock  
See: MC74F373 for Transparent Latch Version  
MC74F374 for 3-State Version  
J SUFFIX  
CERAMIC  
CASE 732-03  
20  
1
CONNECTION DIAGRAM (TOP VIEW)  
V
Q
D
D
Q
Q
D
D
Q
CP  
11  
CC  
7
7
6
6
5
5
4
4
N SUFFIX  
PLASTIC  
20  
19  
18  
17  
16  
15  
14  
13  
12  
CASE 738-03  
20  
1
DW SUFFIX  
SOIC  
CASE 751D-03  
20  
1
1
2
3
4
5
6
7
8
9
10  
E
Q
D
D
Q
Q
D
D
Q
3
GND  
0
0
1
1
2
2
3
ORDERING INFORMATION  
MC74FXXXJ  
Ceramic  
MC74FXXXN Plastic  
MC74FXXXDW SOIC  
FUNCTION TABLE  
Inputs  
Outputs  
Operating Mode  
CP  
E
l
D
Q
n
n
Load “1”  
h
H
Load “0”  
l
l
L
Hold (do nothing)  
h
H
X
X
No Change  
No Change  
X
H = HIGH voltage level steady state; h = HIGH voltage level one setup time prior to the LOW-to-HIGH Clock transition; L = LOW voltage level steady state; l =  
LOW voltage level one setup time prior to the LOW-to-HIGH clock transition; X = Don’t Care; = LOW-to-HIGH clock transition  
FAST AND LS TTL DATA  
4-278  

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