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MC7447AVS1000LB PDF预览

MC7447AVS1000LB

更新时间: 2024-01-27 04:13:00
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
56页 1285K
描述
RISC Microprocessor Hardware Specifications

MC7447AVS1000LB 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LGA包装说明:25 X 25 MM, 2.20 MM HEIGHT, 1.27 MM PITCH, ROHS COMPLIANT, CERAMIC, LGA-360
针数:360Reach Compliance Code:not_compliant
ECCN代码:3A991HTS代码:8542.31.00.01
风险等级:5.7其他特性:ALSO REQUIRES 1.8V OR 2.5V SUPPLY
地址总线宽度:36位大小:32
边界扫描:YES最大时钟频率:167 MHz
外部数据总线宽度:64格式:FLOATING POINT
集成缓存:YESJESD-30 代码:S-CBGA-X360
长度:25 mm低功率模式:YES
湿度敏感等级:1端子数量:360
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:CGA
封装等效代码:LGA360,19X19,50封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):260
电源:1.3,1.8/2.5 V认证状态:Not Qualified
座面最大高度:2.2 mm速度:1000 MHz
子类别:Microprocessors最大供电电压:1.35 V
最小供电电压:1.25 V标称供电电压:1.3 V
表面贴装:YES技术:CMOS
端子形式:UNSPECIFIED端子节距:1.27 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:25 mmuPs/uCs/外围集成电路类型:MICROPROCESSOR, RISC
Base Number Matches:1

MC7447AVS1000LB 数据手册

 浏览型号MC7447AVS1000LB的Datasheet PDF文件第5页浏览型号MC7447AVS1000LB的Datasheet PDF文件第6页浏览型号MC7447AVS1000LB的Datasheet PDF文件第7页浏览型号MC7447AVS1000LB的Datasheet PDF文件第9页浏览型号MC7447AVS1000LB的Datasheet PDF文件第10页浏览型号MC7447AVS1000LB的Datasheet PDF文件第11页 
Comparison with the MPC7447, MPC7445, and MPC7441  
Table 1. Microarchitecture Comparison (continued)  
Microarchitectural Specs  
MPC7447A  
MPC7447  
MPC7445  
MPC7441  
BHT size  
2K-entry  
Link stack depth  
8
3
1
6
Unresolved branches supported  
Branch taken penalty (BTIC hit)  
Minimum misprediction penalty  
Execution Unit Timings (Latency-Throughput)  
Aligned load (integer, float, vector)  
Misaligned load (integer, float, vector)  
L1 miss, L2 hit latency  
3-1, 4-1, 3-1  
4-2, 5-2, 4-2  
9 data/13 instruction  
SFX (aDd Sub, Shift, Rot, Cmp, logicals)  
Integer multiply (32 × 8, 32 × 16, 32 × 32)  
Scalar float  
1-1  
3-1, 3-1, 4-2  
5-1  
VSFX (vector simple)  
1-1  
VCFX (vector complex)  
4-1  
VFPU (vector float)  
4-1  
VPER (vector permute)  
2-1  
MMUs  
TLBs (instruction and data)  
Tablewalk mechanism  
128-entry, 2-way  
Hardware + software  
Instruction BATs/data BATs  
8/8  
L1 I Cache/D Cache Features  
8/8  
8/8  
4/4  
Size  
32K/32K  
8-way  
Way  
Associativity  
Locking granularity  
Parity on Instruction cache  
Parity on data cache  
Number of data cache misses (load/store)  
Data stream touch engines  
Word  
Byte  
5/1  
4 streams  
On-Chip Cache Features  
Cache level  
L2  
Size/associativity  
Access width  
512-Kbyte/8-way  
256-Kbyte/8-way  
256 bits  
MPC7447A RISC Microprocessor Hardware Specifications, Rev. 5  
8
Freescale Semiconductor  

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