MC74
(5)
= 3.3 V or 5.0V , –40°C ≤ T ≤ 125°C, unless otherwise noted.)
DC ELECTRICAL CHARACTERISTICS (V
DD
Characteristic
A
Symbol
Min
Typ
Max
Unit
Power Supply
V
Power–On Reset Threshold
(V Falling Edge or Rising Edge)
V
A
A
POR
1.2
—
—
200
5.0
2.2
350
10
DD
Operating Current
(V = 5.5V, Serial Port Inactive)
I
I
DD
(1)
DD
Standby Supply Current
(V = 3.3 V, Serial Port Inactive)
DD–STANDBY
(4)
—
DD
Temperature–to–Bits Converter
Temperature Accuracy MC74A
+25°C ≤ T ≤ +85°C
T
ERR
°C
–2.0
–3.0
—
—
—
±2.0
+2.0
+3.0
—
A
0°C ≤ T ≤ +125°C
A
–40°C ≤ T ≤ 0°C
A
(2)
CR
Conversion Rate
4.0
8.0
—
sa/sec
Serial Port Interface
V
V
V
Logic Input High
Logic Input Low
0.8 x V
—
—
—
—
V
V
V
IH
DD
0.2 x V
IL
DD
SDA Output Low
(3)
OL
—
—
—
—
0.4
0.6
I
I
= 3 mA
= 6 mA
OL
OL
(3)
C
Input Capacitance SDA, SCL
I/O Leakage
—
5.0
0.1
—
pF
A
IN
I
–1.0
1.0
LEAK
1. Operating current is an average value integrated over multiple conversion cycles. Transient current may exceed this specification.
2. Maximum guaranteed conversion time after Power–On RESET (POR to DATA_RDY) is 250 msec.
3. Output current should be minimized for best temperature accuracy. Power dissipation within the MC74 will cause self–heating and
temperature drift error.
4. SDA and SCL must be connected to V
or GND.
DD
=5.0VforMC74A5–50T. AllparttypesoftheMC74willoperateproperlyoverthewiderpowersupply
5. V
=3.3VforMC74A5–33SNTR. V
DD
DD
range of 2.7V to 5.5V. Each part type is tested and specified for rated accuracy at its nominal supply voltage. As V
varies from the nominal
DD
value, accuracy will degrade 1°C/V of V
change.
DD
SERIAL PORT AC TIMING (V
= 3.3 V or 5.0V, –40°C ≤ (T = T ) ≤ 125°C; C = 80 pF unless otherwise noted.)
A J L
DD
Symbol
Characteristic
SMBus Clock Frequency
Min
10
Typ
—
Max
100
—
Unit
kHz
sec
f
t
t
t
t
t
SMB
Low Clock Period (10% to 10%)
High Clock Period (90% to 90%)
SMBus Rise Time (10% to 90%)
SMBus Fall Time (90% to 10%)
4.7
4.0
—
—
LOW
—
—
sec
HIGH
—
1,000
300
—
nsec
nsec
sec
R
—
—
F
Start Condition Setup Time (90% SCL to 10% SDA)
(for Repeated Start Condition)
4.0
—
SU(START)
t
t
t
t
t
t
Start Condition Hold Time
Data in Setup Time
4.0
1,000
1,250
4.0
—
—
—
—
—
—
—
—
sec
nsec
nsec
sec
H(START)
SU–DATA
H–DATA
SU(STOP)
IDLE
Data in Hold Time
—
Stop Condition Setup Time
Bus Free Time Prior to New Transition
—
4.7
—
sec
Power–On Reset Delay (V
≥ V
DD POR
(Rising Edge))
—
500
sec
POR
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