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MC56F84789VLLR PDF预览

MC56F84789VLLR

更新时间: 2024-11-13 21:12:27
品牌 Logo 应用领域
恩智浦 - NXP 时钟外围集成电路
页数 文件大小 规格书
87页 1109K
描述
MICROCONTROLLER

MC56F84789VLLR 技术参数

生命周期:Transferred包装说明:QFP,
Reach Compliance Code:unknown风险等级:5.76
具有ADC:YES地址总线宽度:
位大小:32最大时钟频率:16 MHz
DAC 通道:YESDMA 通道:YES
外部数据总线宽度:JESD-30 代码:S-PQFP-G100
端子数量:100片上程序ROM宽度:8
最高工作温度:105 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:SQUARE
封装形式:FLATPACKRAM(字节):32768
ROM(单词):294912ROM可编程性:FLASH
速度:100 MHz最大供电电压:3.6 V
最小供电电压:2.7 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子位置:QUADuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

MC56F84789VLLR 数据手册

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Document Number: MC56F847XX  
Rev. 3.1, 06/2014  
Freescale Semiconductor  
Data Sheet: Technical Data  
MC56F847XX  
MC56F847XX  
Supports the 56F84789VLL,  
56F84786VLK, 56F84769VLL,  
56F84766VLK, 56F84763VLH  
Features  
Analog  
This family of digital signal controllers (DSCs) is  
based on the 32-bit 56800EX core. Each device  
combines, on a single chip, the processing power of a  
DSP and the functionality of an MCU with a flexible  
set of peripherals to support many target applications:  
– Industrial control  
– Two high-speed, 8-channel, 12-bit ADCs with  
dynamic x2, x4 programmable amplifier  
– One 20-channel, 16-bit ADC  
– Four analog comparators with integrated 6-bit DAC  
references  
– One 12-bit DAC  
– Home appliances  
– Smart sensors  
PWMs and timers  
– Two eFlexPWM modules with up to 24 PWM  
outputs, one including 8 channels with high  
resolution NanoEdge placement  
– Fire and security systems  
– Switched-mode power supply and power  
management  
– Two 16-bit quad timer (2 x 4 16-bit timers)  
– Two Periodic Interval Timers (PITs)  
– One Quadrature Decoder  
– Uninterruptible Power Supply (UPS)  
– Solar and wind power generator  
– Power metering  
– Motor control (ACIM, BLDC, PMSM, SR, stepper)  
– Handheld power tools  
– Circuit breaker  
– Medical device/equipment  
– Instrumentation  
– Lighting  
– Two Programmable Delay Blocks (PDBs)  
Communication interfaces  
– Three high-speed queued SCI (QSCI) modules with  
LIN slave functionality  
– Up to three queued SPI (QSPI) modules  
– Two SMBus-compatible I2C ports  
– One flexible controller area network (FlexCAN)  
module  
DSC based on 32-bit 56800EX core  
– Up to 100 MIPS at 100 MHz core frequency  
– DSP and MCU functionality in a unified, C-efficient  
architecture  
Security and integrity  
– Cyclic Redundancy Check (CRC) generator  
– Computer operating properly (COP) watchdog  
– External Watchdog Monitor (EWM)  
On-chip memory  
– Up to 288 KB (256 KB + 32 KB) flash memory,  
including up to 32 KB FlexNVM  
Clocks  
– Up to 32 KB RAM  
– Two on-chip relaxation oscillators: 8 MHz (400 kHz  
at standby mode) and 32 kHz  
– Crystal / resonator oscillator  
– Up to 2 KB FlexRAM with EEE capability  
– 100 MHz program execution from both internal  
flash memory and RAM  
– On-chip flash memory and RAM can be mapped  
into both program and data memory spaces  
System  
– DMA controller  
– Integrated power-on reset (POR) and low-voltage  
interrupt (LVI) and brown-out reset module  
– Inter-module crossbar connection  
– JTAG/enhanced on-chip emulation (EOnCE) for  
unobtrusive, real-time debugging  
Freescale reserves the right to change the detail specifications as may be  
required to permit improvements in the design of its products.  
© 2011–2014 Freescale Semiconductor, Inc.  

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