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MC34250FTA

更新时间: 2024-11-10 22:54:55
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 驱动器驱动电子器件驱动程序和接口接口集成电路
页数 文件大小 规格书
4页 145K
描述
HARD DISK DRIVE READ CHANNEL

MC34250FTA 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:64
Reach Compliance Code:unknown风险等级:5.84
Is Samacsys:N接口集成电路类型:READ CHANNEL
JESD-30 代码:S-PQFP-G64长度:10 mm
功能数量:1端子数量:64
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.6 mm
标称供电电压:5 V表面贴装:YES
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmBase Number Matches:1

MC34250FTA 数据手册

 浏览型号MC34250FTA的Datasheet PDF文件第2页浏览型号MC34250FTA的Datasheet PDF文件第3页浏览型号MC34250FTA的Datasheet PDF文件第4页 
Order this document from Analog Marketing  
The Motorola MC34250 is a fully integrated partial response maximum  
likelihood disk drive read/write channel for use in zoned recording  
applications. This device integrates the AGC, active filter, 7 tap equalizer,  
Viterbi detector, frequency synthesizer, servo demodulator, 8/9 rate (0,4/4)  
Encoder/Decoder with write precompensation and power management in a  
single 64 pin 10 mm x 10 mm TQFP package.  
HARD DISK DRIVE  
READ CHANNEL  
SEMICONDUCTOR  
TECHNICAL DATA  
FEATURES:  
50 to 200 MBPS Programmable Data Rate  
800 mW at 200 MBPS and 5.0 V  
Channel Monitor Output  
Programmable AGC Charge Pump Currents with Different Values for  
Data and Servo Envelope Modes and Gain Gradient Mode  
Programmable AGC Peak Detector Droop Currents with Different  
Values for Data and Servo Envelope Modes  
Separate AGC Charge Pump Outputs for Data and Servo Modes  
Programmable Dual Threshold Qualifier or Hysteresis Comparator Type  
Pulse Detector for Servo Data Detection.  
64  
1
ERD and Polarity Outputs for Servo Timing and Raw Encoded Data  
Integrated 7 pole 0.05° Equiripple Linear Phase Filter with  
Programmable Bandwidth from 5.0 MHz to 80 MHz and Different Values  
for Both Data and Servo Modes  
FTA SUFFIX  
PLASTIC PACKAGE  
CASE 840F  
Programmable Symmetrical Boost from 0 to 10 dB and Different Values  
(Thin QFP)  
for Data and Servo Modes  
Programmable Asymmetrical Boost of Up to ±40% of Nominal Filter  
Group Delay in Both Data and Servo Modes  
7 Tap Continuous Time Transversal Equalizer with 8 Bit Programmable  
Tap Weights and Integrated Decision Directed Sign–Sign Least Mean  
Squared Adaptation  
ORDERING INFORMATION  
Operating  
Temperature Range  
Device  
Package  
Internal Offset Cancellation Loops  
Fast Acquisition Data Phase Locked Loop with Zero Phase Restart  
Programmable Data Phase Locked Loop Charge Pump Current  
MC34250FTA  
T
A
= 0° to +70°C  
TQFP–64  
Integrated Soft Decision Viterbi Detectors with Programmable Merge  
References  
Integrated 8/9 Rate (0,4/4) Encoder and Decoder with Code Scrambler  
and Descrambler  
Programmable 2/4/8 Bit NRZ Data Interface  
Programmable Write Precompensation Delays Locked to the Frequency  
Synthesizer  
Differential PECL Write Data Outputs  
External Write Data Path for DC Erase or Other Non–Encoded Data  
Integrated Write Current DAC  
Programmable Power Management  
Bi–Directional Serial Microprocessor Interface  
Various Test Modes Controlled Via the Serial Microprocessor Interface  
This document contains information on a product under development. Motorola reserves the  
right to change or discontinue this product without notice.  
Motorola, Inc. 1996  
Issue 0  

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