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MC14LC5447DW PDF预览

MC14LC5447DW

更新时间: 2024-11-11 04:40:59
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 电信集成电路光电二极管
页数 文件大小 规格书
12页 263K
描述
Calling Line Identification (CLID) Receiver with Ring Detector

MC14LC5447DW 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP16,.4Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.64
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:10.3 mm功能数量:1
端子数量:16最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not Qualified座面最大高度:2.65 mm
子类别:Telephone Circuits最大压摆率:5.5 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS电信集成电路类型:TELEPHONE CALLING NO IDENTIFICATION CIRCUIT
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.5 mmBase Number Matches:1

MC14LC5447DW 数据手册

 浏览型号MC14LC5447DW的Datasheet PDF文件第2页浏览型号MC14LC5447DW的Datasheet PDF文件第3页浏览型号MC14LC5447DW的Datasheet PDF文件第4页浏览型号MC14LC5447DW的Datasheet PDF文件第5页浏览型号MC14LC5447DW的Datasheet PDF文件第6页浏览型号MC14LC5447DW的Datasheet PDF文件第7页 
Order this document  
by MC14LC5447/D  
SEMICONDUCTOR TECHNICAL DATA  
Product Preview  
P SUFFIX  
PLASTIC DIP  
CASE 648  
16  
1
The MC14LC5447 is a silicon gate HCMOS IC designed to demodulate Bell  
202 and V.23 1200–baud FSK asynchronous data. The primary application for  
this device is in products that will be used to receive and display the calling  
number, or message waiting indicator sent to subscribers from participating  
central office facilities of the public switched network. The device also contains  
a carrier detect circuit and ring detector which may be used to power up the  
device.  
DW SUFFIX  
SOG PACKAGE  
CASE 751G  
16  
1
ORDERING INFORMATION  
Applications for this device include adjunct boxes, answering machines,  
feature phones, fax machines, and computer interface products.  
The MC14LC5447 offers the following performance features.  
MC14LC5447P  
Plastic DIP  
MC14LC5447DW SOG Package  
Ring Detector On–Chip  
Ring Detect Output for MCU Interrupt  
Power–Down Mode, Less than 1 µA  
PIN ASSIGNMENT  
Single Supply: + 3.5 to + 6.0 V  
TI  
1
2
16  
15  
V
DD  
Pin Selectable Clock Frequencies: 3.68 MHz, 3.58 MHz, or 455 kHz  
Two Stage Power–Up for Power Management Control  
Demodulates Bell 202 and V.23  
RI  
DOC  
RDI1  
RDI2  
3
4
14  
13  
DOR  
CDO  
NC  
RT  
5
6
12  
11  
RDO  
BLOCK DIAGRAM  
CLKSIN  
PWRUP  
7
8
10  
9
OSC  
1
in  
TIP  
V
BPF  
DEMOD  
AG  
2
V
OSC  
SS  
out  
+
RING  
14  
15  
DOR  
DOC  
NC = NO CONNECTION  
3
4
RDI1  
RDI2  
RING  
DETECT  
CIRCUIT  
13  
CDO  
VALID  
DATA  
6
RT  
DETECT  
12  
RDO  
INTERNAL  
POWER UP  
7
PWRUP  
11  
CLOCK  
GEN  
CLKSIN  
10  
9
OSC  
OSC  
in  
16  
8
V
DD  
V
out  
SS  
NO CONNECT (5)  
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.  
REV 0  
7/96  
Motorola, Inc. 1996  

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