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MC145406N,129 PDF预览

MC145406N,129

更新时间: 2024-11-23 14:53:11
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
5页 47K
描述
MC145406N

MC145406N,129 技术参数

生命周期:Obsolete包装说明:PLASTIC, DIP-16
Reach Compliance Code:unknown风险等级:5.72
Is Samacsys:NBase Number Matches:1

MC145406N,129 数据手册

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Philips Semiconductors Linear Products  
Product specification  
EIA-232-D/V.28 driver/receiver  
MC145406  
DESCRIPTION  
PIN CONFIGURATION  
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers  
and 3 receivers to fulfill the electrical specifications of standards  
EIA-232-D and CCITT V.28. The drivers feature true TTL input  
D and N Packages  
V
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
DD  
CC  
compatibility, slew-rate limited output, 300power-off source  
impedance, and output typically switching to within 25% of the  
supply rails. The receivers can handle up to +25V while presenting  
3 to 7kimpedance. Hysteresis in the receiver aids reception of  
noisy signals. By combining both drivers and receivers in a single  
CMOS chip, the MC145406 provides efficient, low-power solutions  
for EIA-232-D and V.28 applications.  
R
R
RX  
DO1  
DI1  
1
1
2
2
3
3
TX  
D
D
D
RX  
TX  
DO2  
DI2  
RX  
TX  
V
DO3  
R
DI3  
APPLICATIONS  
GND  
SS  
Modem interface  
NOTE:  
D = Driver  
R = Receiver  
Voice/data telephone interface  
Lap-top computers  
UART interface  
Maximum slew rate = 30V/µs  
Receivers  
FEATURES  
+25V input voltage range over the full supply range  
3 to 7kinput impedance  
Drivers  
+5 to +12V supply range  
300power-off source impedance  
Output current limiting  
TTL compatible  
Hysteresis on input switchpoint  
General  
Very low supply currents for long battery life  
Operation is independent of power supply sequencing  
ORDERING INFORMATION  
DESCRIPTION  
TEMPERATURE RANGE  
0 to +70°C  
ORDER CODE  
MC145406N  
MC145406D  
DWG #  
0406C  
0171B  
16-Pin Plastic Dual In-Line (DIP) Package  
16-Pin Small Outline Large (SOL) Package  
0 to +70°C  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
RATING  
UNITS  
V
V
Supply voltage  
Supply voltage  
Supply voltage  
Input voltage range  
-0.5 to +6.0  
-0.5 to +13.5  
+0.5 to -13.5  
V
V
V
CC  
DD  
V
SS  
RX inputs  
DI inputs  
1-3  
(V - 15) to (V + 15)  
V
IR  
V
1-3  
SS  
DD  
-0.5 to (V + 0.5)  
CC  
DC current per pin  
+100  
1.0  
mA  
W
P
D
Power dissipation (package)  
Operating temperature range  
Storage temperature range  
°C  
°C  
T
A
0 to +70  
T
STG  
-65 to +150  
Thermal impedance  
N package  
D package  
80  
105  
θ
°C/W  
JA  
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is  
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.  
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V < V and GND < V  
DI  
DD  
DO  
< V . Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V < V  
< V . Unused inputs  
CC  
SS  
TX1-3  
DD  
must always be tied to an appropriate logic voltage level (e.g., GND or V for DI, and V or V for RX).  
CC  
SS  
DD  
467  
August 31, 1994  
853-1430 13721  

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