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MC145406P PDF预览

MC145406P

更新时间: 2024-11-22 22:58:11
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
12页 159K
描述
Driver/Receiver(EIA 232-E and CCITT V.28(Formerly RS-232-D)

MC145406P 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP,
针数:16Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.72Is Samacsys:N
差分输出:NO驱动器位数:3
输入特性:SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-232-E; V.28JESD-30 代码:R-PDIP-T16
JESD-609代码:e0长度:19.175 mm
标称负供电电压:-12 V功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出特性:TOTEM-POLE
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大接收延迟:425 ns
接收器位数:3座面最大高度:4.44 mm
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V电源电压1-最大:13.2 V
电源电压1-分钟:4.5 V电源电压1-Nom:12 V
表面贴装:NO技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大传输延迟:500 ns宽度:7.62 mm
Base Number Matches:1

MC145406P 数据手册

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Order this document  
by MC145406/D  
SEMICONDUCTOR TECHNICAL DATA  
EIA 232–E and CCITT V.28 (Formerly RS–232–D)  
P SUFFIX  
PLASTIC  
CASE 648  
The MC145406 is a silicon–gate CMOS IC that combines three drivers  
and three receivers to fulfill the electrical specifications of standards  
EIA 232–E and CCITT V.28. The drivers feature true TTL input  
compatibility, slew–rate–limited output, 300–power–off source imped-  
ance, and output typically switching to within 25% of the supply rails. The  
receivers can handle up to ± 25 V while presenting 3 to 7 kimpedance.  
Hysteresis in the receivers aids reception of noisy signals. By combining  
both drivers and receivers in a single CMOS chip, the MC145406 provides  
efficient, low–power solutions for EIA 232–E and V.28 applications.  
16  
1
DW SUFFIX  
SOG  
CASE 751G  
16  
Drivers  
± 5 V to ±12 V Supply Range  
300–Power–Off Source Impedance  
Output Current Limiting  
TTL Compatible  
Maximum Slew Rate = 30 V/µs  
1
SD SUFFIX  
SSOP  
CASE 940B  
Receivers  
± 25 V Input Voltage Range When V  
= 12 V, V  
= – 12 V  
DD  
SS  
3 to 7 kInput Impedance  
Hysteresis on Input Switchpoint  
PIN ASSIGNMENT  
BLOCK DIAGRAM  
V
V
1
2
16  
15  
CC  
DD  
RECEIVER  
V
DD  
V
DD  
R
R
R
DO1  
DI1  
Rx1  
Tx1  
V
CC  
V
CC  
*
3
4
5
6
7
14  
13  
12  
11  
10  
15 k  
D
D
D
Rx  
+
DO  
DO2  
5.4 k  
Rx2  
Tx2  
V
1.0 V  
1.8 V  
SS  
DI2  
DO3  
Rx3  
Tx3  
HYSTERESIS  
V
DI3  
V
DD  
DRIVER  
GND  
V
8
9
SS  
CC  
D = DRIVER  
R = RECEIVER  
300  
+
DI  
LEVEL  
SHIFT  
Tx  
1.4 V  
V
SS  
*Protection circuit  
REV 4  
1/95  
Motorola, Inc. 1995  

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