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MC144144 PDF预览

MC144144

更新时间: 2024-01-09 22:15:46
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 解码器
页数 文件大小 规格书
44页 568K
描述
Enhanced Closed-Caption Decoder CMOS

MC144144 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP, DIP18,.3Reach Compliance Code:unknown
风险等级:5.92Is Samacsys:N
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:R-PDIP-T18
JESD-609代码:e0端子数量:18
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP18,.3封装形状:RECTANGULAR
封装形式:IN-LINE电源:5 V
认证状态:Not Qualified子类别:Other Consumer ICs
最大压摆率:20 mA表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
Base Number Matches:1

MC144144 数据手册

 浏览型号MC144144的Datasheet PDF文件第2页浏览型号MC144144的Datasheet PDF文件第3页浏览型号MC144144的Datasheet PDF文件第4页浏览型号MC144144的Datasheet PDF文件第6页浏览型号MC144144的Datasheet PDF文件第7页浏览型号MC144144的Datasheet PDF文件第8页 
AC AND TIMING CHARACTERISTICS (continued)  
Parameter  
Conditions  
Horizontal Timing  
The timing of the ouput signals box  
and RGB have been set to make a  
centered display.  
The positioning of these outputs can be adjusted in 330 ns increments by writing a  
new value to the H Position Register.  
Control Port Signals – Two–Wire Serial Mode (SMS = LOW, SEN = HIGH) (See Figure 10)  
Clock and Data Transitions: The SCK Start Condition: A high–to–low transition of SDA with SCK high is a start condition  
and SDA bus lines are normally pulled which must precede any other command.  
high with a resistor. Data on the SDA  
Stop Condition: A low–to–high transition of SDA with SCK high is a stop condition  
bus may only change during SCK low which terminates all communications.  
time periods. Data changes during  
SCK high periods will indicate a start  
or stop condition.  
Acknowledge: All address and data  
words are serially transmitted to and  
from the MC144144 in eight bit words.  
A ninth bit time is used for the  
acknowledge.  
The acknowledging device does so by pulling the SDA bus low during the ninth  
bit.  
Control Port Signals – Three–Wire Serial Mode (SMS = HIGH) (See Figure 11)  
Three–wire bus with Clock signal on  
SCK pin, Serial Data Input on SDA  
pin and Serial Data Output on SDO  
pin.  
SEN pin LOW disabled the port, placing SDO in three–state. Signal transitions on  
SCK and SDA are ignored.  
SEN pin HIGH enables the port for operation.  
SEN and SMS pins LOW is a hardware reset for the part. These pins must be held  
low for at least 100 ns.  
Serial synchronization can be established by clocking in the minimum required  
SSR string of FFh, FFh, FEh. More than two bytes of FFh may be input but the  
string must end with FEh.  
MC144144  
5
MOTOROLA  

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