SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 620
The MC14028B decoder is constructed so that an 8421 BCD code on the
four inputs provides a decimal (one–of–ten) decoded output, while a 3–bit
binary input provides a decoded octal (one–of–eight) code output with D
forced to a logic “0”. Expanded decoding such as binary–to–hexadecimal
(one–of–16), etc., can be achieved by using other MC14028B devices. The
part is useful for code conversion, address decoding, memory selection
control, demultiplexing, or readout decoding.
P SUFFIX
PLASTIC
CASE 648
•
•
•
Diode Protection on All Inputs
D SUFFIX
SOIC
CASE 751B
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Positive Logic Design
Low Outputs on All Illegal Input Combinations
Similar to CD4028B.
•
•
•
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
MAXIMUM RATINGS* (Voltages Referenced to V
)
SS
T
A
= – 55° to 125°C for all packages.
Symbol
Parameter
DC Supply Voltage
Value
Unit
V
V
DD
– 0.5 to + 18.0
V , V
in out
Input or Output Voltage (DC or Transient)
– 0.5 to V
DD
+ 0.5
V
l , l
in out
Input or Output Current (DC or Transient),
per Pin
± 10
mA
P
Power Dissipation, per Package†
Storage Temperature
500
mW
C
D
T
stg
– 65 to + 150
260
T
Lead Temperature (8–Second Soldering)
C
L
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
TRUTH TABLE
D C B A Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
BLOCK DIAGRAM
Q0
Q1
3
10
13
12
11
A
B
C
D
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
14
3–BIT
BINARY
INPUTS
Q2
Q3
Q4
2
15
1
OCTAL
DECODED
OUTPUTS
8421
BCD
DECIMAL
DECODED
OUTPUTS
1
1
1
1
0
0
0
0
0
0
1
1
0
1
0
1
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Q5
Q6
Q7
6
7
4
INPUTS
Q8
Q9
9
5
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
V
V
= PIN 16
= PIN 8
DD
SS
REV 3
1/94
Motorola, Inc. 1995
MOTOROLA CMOS LOGIC DATA
MC14028B
113