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MC14021BDR2G PDF预览

MC14021BDR2G

更新时间： 2024-11-03 21:54:07
品牌 Logo 应用领域
安森美 - ONSEMI 移位寄存器触发器逻辑集成电路光电二极管PC
页数 文件大小 规格书
8页 104K
描述
8-Bit Static Shift Register

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MC14021BDR2G 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：SOIC
包装说明：ROHS COMPLIANT, PLASTIC, SOIC-16针数：16
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：0.56
Samacsys Confidence：3Samacsys Status：Released
Samacsys PartID：225138Samacsys Pin Count：16
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Small Outline Packages
Samacsys Footprint Name：SOIC-16 CASE751B-05Samacsys Released Date：2015-08-07 09:43:06
Is Samacsys：N计数方向：RIGHT
系列：4000/14000/40000JESD-30 代码：R-PDSO-G16
JESD-609代码：e3长度：9.9 mm
逻辑集成电路类型：PARALLEL IN SERIAL OUT最大频率@ Nom-Sup：1500000 Hz
湿度敏感等级：1位数：8
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-55 °C
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：5/15 V
传播延迟（tpd）：800 ns认证状态：Not Qualified
座面最大高度：1.75 mm子类别：Shift Registers
最大供电电压 (Vsup)：18 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40触发器类型：POSITIVE EDGE
宽度：3.9 mm最小 fmax：4 MHz
Base Number Matches：1

MC14021BDR2G 数据手册

 浏览型号MC14021BDR2G的Datasheet PDF文件第2页浏览型号MC14021BDR2G的Datasheet PDF文件第3页浏览型号MC14021BDR2G的Datasheet PDF文件第4页浏览型号MC14021BDR2G的Datasheet PDF文件第5页浏览型号MC14021BDR2G的Datasheet PDF文件第6页浏览型号MC14021BDR2G的Datasheet PDF文件第7页 
MC14014B, MC14021B  
8−Bit Static Shift Register  
The MC14014B and MC14021B 8−bit static shift registers are  
constructed with MOS P−channel and N−channel enhancement mode  
devices in a single monolithic structure. These shift registers find primary  
use in parallel−to−serial data conversion, synchronous and asynchronous  
parallel input, serial output data queueing; and other general purpose  
register applications requiring low power and/or high noise immunity.  
http://onsemi.com  
MARKING  
Features  
DIAGRAMS  
• Synchronous Parallel Input/Serial Output (MC14014B)  
• Asynchronous Parallel Input/Serial Output (MC14021B)  
• Synchronous Serial Input/Serial Output  
• Full Static Operation  
16  
1
PDIP−16  
P SUFFIX  
CASE 648  
MC140xxBCP  
AWLYYWW  
• “Q” Outputs from Sixth, Seventh, and Eighth Stages  
• Double Diode Input Protection  
16  
• Supply Voltage Range = 3.0 Vdc to 18 Vdc  
SOIC−16  
D SUFFIX  
CASE 751B  
140xxB  
AWLYWW  
• Capable of Driving Two Low−power TTL Loads or One Low−power  
Schottky TTL Load Over the Rated Temperature Range  
• MC14014B Pin−for−Pin Replacement for CD4014B  
1
• MC14021B Pin−for−Pin Replacement for CD4021B  
• Pb−Free Packages are Available*  
16  
SOEIAJ−16  
F SUFFIX  
CASE 966  
MC140xxB  
AWLYWW  
MAXIMUM RATINGS (Voltages Referenced to V  
)
SS  
1
Symbol  
Parameter  
Value  
−0.5 to +18.0  
Unit  
V
V
DD  
DC Supply Voltage Range  
V , V  
Input or Output Voltage Range  
(DC or Transient)  
−0.5 to V + 0.5  
V
in out  
DD  
xx  
A
WL, L  
YY, Y  
= Specific Device Code  
= Assembly Location  
= Wafer Lot  
I , I  
in out  
Input or Output Current  
(DC or Transient) per Pin  
±10  
mA  
= Year  
WW, W = Work Week  
P
D
Power Dissipation, per Package  
(Note 1)  
500  
mW  
T
Ambient Temperature Range  
Storage Temperature Range  
−55 to +125  
−65 to +150  
260  
°C  
°C  
°C  
A
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
T
stg  
T
Lead Temperature  
L
dimensions section on page 6 of this data sheet.  
(8−Second Soldering)  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. Temperature Derating:  
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C  
This device contains protection circuitry to guard against damage due to high  
static voltages or electric fields. However, precautions must be taken to avoid  
applications of any voltage higher than maximum rated voltages to this  
high−impedance circuit. For proper operation, V and V should be constrained  
in  
out  
to the range V v (V or V ) v V  
.
SS  
in  
out  
DD  
Unused inputs must always be tied to an appropriate logic voltage level  
(e.g., either V or V ). Unused outputs must be left open.  
SS  
DD  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
Semiconductor Components Industries, LLC, 2005  
1
Publication Order Number:  
February, 2005 − Rev. 5  
MC14014B/D  
 
12345678

中文翻译

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MC14021BDR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC14021BD ONSEMI

完全替代

 8-Bit Static Shift Register
MC14021BDG ONSEMI

完全替代

 8-Bit Static Shift Register
MC14021BDR2 ONSEMI

类似代替

 8-Bit Static Shift Register

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