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MC10XS3412JHFK PDF预览

MC10XS3412JHFK

更新时间: 2024-11-15 02:52:55
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
60页 2026K
描述
Quad high-side switch (dual 10 mOhm, dual 12 mOhm)

MC10XS3412JHFK 数据手册

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Document Number: MC10XS3412  
Rev. 13.0, 8/2018  
NXP Semiconductors  
Technical Data  
Quad high-side switch  
(dual 10 mOhm, dual 12 mOhm)  
10XS3412  
The 10XS3412 is one in a family of devices designed for low-voltage automotive  
lighting applications. Its four low RDS(on) MOSFETs (dual 10 mOhm/dual  
12 mOhm) can control four separate 55/28 W bulbs, and/or Xenon modules,  
and/or LEDs.  
HIGH-SIDE SWITCH  
Programming, control and diagnostics are accomplished using a 16-bit SPI  
interface. Its output with selectable slew rate improves electromagnetic  
compatibility (EMC) behavior. Additionally, each output has its own parallel input  
or SPI control for pulse-width modulation (PWM) control. The 10XS3412 allows  
the user to program via the SPI the fault current trip levels and duration of  
acceptable lamp inrush. The device has Fail-safe mode to provide functionality  
of the outputs in case of MCU damage.  
Features  
• Four protected 10 mΩ and 12 mΩ high-side switches (at 25 °C)  
FK SUFFIX (PB-FREE)  
FK SUFFIX (PB-FREE)  
98ASA00426D  
• Operating voltage range of 6.0 to 20 V with sleep current < 5.0 μA,  
98ARL10596D  
24-PIN PQFN  
extended mode from 4.0 to 28 V  
24-PIN PQFN  
• 8.0 MHz 16-bit 3.3 V and 5.0 V SPI control and status reporting with daisy  
chain capability  
• PWM module using external clock or calibratable internal oscillator with  
programmable outputs delay management  
• Smart overcurrent shutdown, severe short-circuit, overtemperature  
protection with time limited autoretry, and Fail-safe mode in case of MCU  
damage  
• Output OFF or ON openload detection compliant to bulbs or LEDs and  
short to battery detection  
• Analog current feedback with selectable ratio and board temperature  
feedback  
V
VDD  
VPWR VDD  
VPWR  
DD  
10XS3412  
VDD  
VPWR  
HS0  
WAKE  
FS  
LOAD  
LOAD  
LOAD  
LOAD  
I/O  
SCLK  
CS  
SCLK  
CS  
SO  
RST  
SI  
IN0  
IN1  
IN2  
IN3  
CSNS  
FSI  
HS1  
HS2  
HS3  
SI  
I/O  
SO  
I/O  
I/O  
I/O  
MCU  
I/O  
A/D  
GND  
GND  
Figure 1. 10XS3412 simplified application diagram  
© NXP B.V. 2018.  

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