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MC10E452FNR2 PDF预览

MC10E452FNR2

更新时间： 2024-11-06 04:59:39
品牌 Logo 应用领域
安森美 - ONSEMI 触发器逻辑集成电路
页数 文件大小 规格书
8页 136K
描述
5V ECL 5-Bit Differential Register

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MC10E452FNR2 数据手册

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MC10E452, MC100E452  
5VꢀECL 5-Bit Differential  
Register  
Description  
The MC10E/100E452 is a 5-bit differential register with differential  
data (inputs and outputs) and clock. The registers are triggered by a  
positive transition of the positive clock (CLK) input. A high on the  
Master Reset (MR) asynchronously resets all registers so that the Q  
outputs go LOW.  
http://onsemi.com  
PLCC−28  
The differential input structures are clamped so that the inputs of  
unused registers can be left open without upsetting the bias network of  
the device. The clamping action will assert the D and the CLK sides of  
the inputs. Because of the edge triggered flip-flop nature of the device  
simultaneously opening both the clock and data inputs will result in an  
output which reaches an unidentified but valid state. Note that the  
FN SUFFIX  
CASE 776  
MARKING DIAGRAM*  
1 28  
input clamps only operate when both inputs fall to 2.5 V below V  
.
CC  
The fully differential design of the device makes it ideal for very  
high frequency applications where a registered data path is necessary.  
MCxxxE452FNG  
AWLYYWW  
The V pin, an internally generated voltage supply, is available to  
BB  
this device only. For single-ended input conditions, the unused  
differential input is connected to V as a switching reference voltage.  
BB  
V
BB  
may also rebias AC coupled inputs. When used, decouple V  
BB  
and V via a 0.01 mF capacitor and limit current sourcing or sinking  
CC  
xxx  
A
WL  
YY  
WW  
G
= 10 or 100  
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
to 0.5 mA. When not used, V should be left open.  
BB  
The 100 Series contains temperature compensation.  
Features  
• Differential D, CLK and Q; V Reference Available  
BB  
• 1100 MHz Min. Toggle Frequency  
• Asynchronous Master Reset  
*For additional marking information, refer to  
Application Note AND8002/D.  
• PECL Mode Operating Range: V = 4.2 V to 5.7 V  
CC  
with V = 0 V  
EE  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
• NECL Mode Operating Range: V = 0 V  
CC  
with V = −4.2 V to −5.7 V  
EE  
• Internal Input 50 kW Pulldown Resistors, Output Q will Default to  
3
Low State When Inputs Are Left Open  
• ESD Protection: Human Body Model; > 2 kV  
Machine Model; > 200 V  
Charged Device Model; > 2 kV  
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
• Moisture Sensitivity Level:  
Pb = 1  
Pb−Free = 3  
For Additional Information, see Application Note AND8003/D  
• Flammability Rating: UL 94 V−0 @ 0.125 in,  
Oxygen Index: 28 to 34  
• Transistor Count = 315 devices  
• Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 11  
MC10E452/D  
12345678

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MC10E452FNR2 替代型号

型号 品牌 替代类型 描述 数据表
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