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MC10E163FN PDF预览

MC10E163FN

更新时间: 2024-10-01 04:59:39
品牌 Logo 应用领域
安森美 - ONSEMI 解复用器逻辑集成电路
页数 文件大小 规格书
8页 126K
描述
5V ECL 2-Bit 8:1 Multiplexer

MC10E163FN 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:QLCC包装说明:PLASTIC, LCC-28
针数:28Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.4
其他特性:NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V系列:10E
JESD-30 代码:S-PQCC-J28JESD-609代码:e0
长度:11.505 mm逻辑集成电路类型:MULTIPLEXER
湿度敏感等级:1功能数量:2
输入次数:8输出次数:1
端子数量:28最高工作温度:85 °C
最低工作温度:输出特性:OPEN-EMITTER
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):240电源:-5.2 V
最大电源电流(ICC):88 mAProp。Delay @ Nom-Sup:0.8 ns
传播延迟(tpd):0.9 ns认证状态:Not Qualified
座面最大高度:4.57 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.7 V最小供电电压 (Vsup):4.2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:ECL温度等级:OTHER
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:11.505 mm
Base Number Matches:1

MC10E163FN 数据手册

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MC10E163, MC100E163  
5VꢀECL 2-Bit 8:1 Multiplexer  
Description  
The MC10E/100E163 contains two 8:1 multiplexers with  
differential outputs and common select inputs. The select inputs  
(SEL0, 1, 2) control which one of the eight data inputs (A A ,  
0
7
http://onsemi.com  
B B ) is propagated to the output.  
0
7
The 100 Series contains temperature compensation.  
Features  
850 ps Maximum D to Output  
Differential Outputs  
PECL Mode Operating Range:  
V
= 4.2 V to 5.7 V with V = 0 V  
CC  
EE  
PLCC28  
FN SUFFIX  
CASE 776  
NECL Mode Operating Range:  
= 0 V with V = 4.2 V to 5.7 V  
V
CC  
EE  
Internal Input 50 kW Pulldown Resistors  
ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 200 V  
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
MARKING DIAGRAM*  
Moisture Sensitivity Level:  
1
Pb = 1  
PbFree = 3  
For Additional Information, see Application Note AND8003/D  
Flammability Rating: UL 94 V0 @ 0.125 in,  
Oxygen Index: 28 to 34  
MCxxxE163FNG  
AWLYYWW  
Transistor Count = 262 devices  
PbFree Packages are Available*  
xxx  
= 10 or 100  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= PbFree Package  
WL  
YY  
WW  
G
*For additional marking information, refer to  
Application Note AND8002/D.  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
*For additional information on our PbFree strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 Rev. 10  
MC10E163/D  

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