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MB96F379RWBPMC1-GSE2 PDF预览

MB96F379RWBPMC1-GSE2

更新时间: 2024-11-18 15:40:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟微控制器外围集成电路
页数 文件大小 规格书
125页 11299K
描述
Microcontroller, 16-Bit, FLASH, F2MC-16F CPU, 40MHz, CMOS, PQFP144,

MB96F379RWBPMC1-GSE2 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:QFP, QFP144,.71SQ,16Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.45
具有ADC:YES地址总线宽度:24
位大小:16CPU系列:F2MC-16F
最大时钟频率:56 MHzDAC 通道:NO
DMA 通道:YES外部数据总线宽度:16
JESD-30 代码:S-PQFP-G144长度:16 mm
I/O 线路数量:120端子数量:144
最高工作温度:125 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:QFP144,.71SQ,16
封装形状:SQUARE封装形式:FLATPACK
电源:3.3/5 V认证状态:Not Qualified
RAM(字节):32768ROM(单词):851968
ROM可编程性:FLASH速度:40 MHz
子类别:Microcontrollers最大压摆率:61.5 mA
最大供电电压:5.5 V最小供电电压:3 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:0.4 mm
端子位置:QUAD宽度:16 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

MB96F379RWBPMC1-GSE2 数据手册

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MB96370 Series  
F2MC-16FX 16-bit Proprietary  
Microcontroller  
MB96370 series is based on Cypress advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The  
CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new  
16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the  
same operation frequency, reduced power consumption and faster start-up time.  
For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 40MHz  
operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 25ns going together with  
excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The  
emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to  
select suitable operation frequencies for peripheral resources independent of the CPU speed.  
Features  
Technology  
Code Security  
0.18m CMOS  
Protects ROM content from unintended read-out  
CPU  
Memory Patch Function  
F2MC-16FX CPU  
Replaces ROM content  
Up to 40 MHz internal, 25 ns instruction cycle time  
Can also be used to implement embedded debug support  
Optimized instruction set for controller applications (bit, byte,  
wordandlong-worddatatypes;23differentaddressingmodes;  
barrel shift; variety of pointers)  
DMA  
Automatic transfer function independent of CPU, can be  
assigned freely to resources  
8-byte instruction execution queue  
Interrupts  
Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit)  
instructions available  
Fast Interrupt processing  
8 programmable priority levels  
Non-Maskable Interrupt (NMI)  
System clock  
On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop)  
3 MHz - 16 MHz external crystal oscillator clock (maximum  
frequency when using ceramic resonator depends on  
Q-factor).  
Timers  
Three independent clock timers (23-bit RC clock timer, 23-bit  
Main clock timer, 17-bit Sub clock timer)  
Up to 40 MHz external clock  
Watchdog Timer  
32 kHz - 100 kHz subsystem quartz clock  
CAN  
100kHz/2MHz internal RC clock for quick and safe startup,  
oscillator stop detection, watchdog  
Supports CAN protocol version 2.0 part A and B  
ISO16845 certified  
Clock source selectable from main- and subclock oscillator  
(part number suffix “W”) and on-chip RC oscillator, indepen-  
dently for CPU and 2 clock domains of peripherals.  
Bit rates up to 1 Mbit/s  
32 message objects  
LowPowerConsumption-13operatingmodes: (differentRun,  
Sleep, Timer modes, Stop mode)  
Each message object has its own identifier mask  
Clock modulator  
Programmable FIFO mode (concatenation of message  
objects)  
On-chip voltage regulator  
Maskable interrupt  
Internal voltage regulator supports reduced internal MCU  
voltage, offering low EMI and low power consumption figures  
Disabled Automatic Retransmission mode for Time Triggered  
CAN applications  
Low voltage reset  
Programmable loop-back mode for self-test operation  
Reset is generated when supply voltage is below minimum.  
Cypress Semiconductor Corporation  
Document Number: 002-04590 Rev. *A  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 22, 2016  

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