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MB91266APMC-G-XXXE1 PDF预览

MB91266APMC-G-XXXE1

更新时间： 2024-11-15 03:13:23
品牌 Logo 应用领域
富士通 - FUJITSU 微控制器
页数 文件大小 规格书
55页 394K
描述
32-bit Proprietary Microcontrollers

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MB91266APMC-G-XXXE1 技术参数

是否Rohs认证： 符合生命周期：Contact Manufacturer
包装说明：LQFP,Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.74
具有ADC：YES地址总线宽度：
位大小：32最大时钟频率：12 MHz
DAC 通道：NODMA 通道：YES
外部数据总线宽度：JESD-30 代码：S-PQFP-G64
JESD-609代码：e6长度：12 mm
I/O 线路数量：48端子数量：64
最高工作温度：105 °C最低工作温度：-40 °C
PWM 通道：NO封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE峰值回流温度（摄氏度）：260
认证状态：Not QualifiedROM可编程性：MROM
座面最大高度：1.7 mm速度：33 MHz
最大供电电压：5.5 V最小供电电压：4 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN BISMUTH端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：12 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

MB91266APMC-G-XXXE1 数据手册

 浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第2页浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第3页浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第4页浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第5页浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第6页浏览型号MB91266APMC-G-XXXE1的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS07-16702-3E  
32-bit Proprietary Microcontrollers  
CMOS  
FR60Lite MB91265A Series  
MB91266A/MB91F267A/MB91F267NA/MB91V265A  
■ DESCRIPTION  
The MB91265A series is a 32-bit RISC microcontroller designed by Fujitsu for embedded control applications  
which require high-speed processing.  
The CPU is used the FR family* and the compatibility of FR60Lite.  
MB91F267NA loads the C-CAN (1 channel) .  
* : FR, the abbreviation of FUJITSU RISC controller, is a line of products of FUJITSU Limited.  
■ FEATURES  
• FR60Lite CPU  
• 32-bit RISC, load/store architecture with a five-stage pipeline  
• Maximum operating frequency : 33 MHz (oscillation frequency 4.192 MHz, oscillation frequency 8-multiplier  
(PLL clock multiplication method)  
• 16-bit fixed length instructions (basic instructions)  
• Execution speed of instructions : 1 instruction per cycle  
• Memory-to-memory transfer, bit handling, barrel shift instructions, etc. : Instructions suitable for embedded  
applications  
• Function entry/exit instructions, multiple-register load/store instructions : Instructions adapted for C-language  
• Register interlock function : Facilitates coding in assembler.  
• Built-in multiplier with instruction-level support  
• 32-bit multiplication with sign : 5 cycles  
• 16-bit multiplication with sign : 3 cycles  
• Interrupt (PC, PS save) : 6 cycles, 16 priority levels  
• Harvard architecture allowing program access and data access to be executed simultaneously  
• Instruction compatible with FR family  
(Continued)  
Be sure to refer to the “Check Sheet” for the latest cautions on development.  
“Check Sheet” is seen at the following support page  
URL : http://www.fujitsu.com/global/services/microelectronics/product/micom/support/index.html  
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system  
development.  
Copyright©2005-2007 FUJITSU LIMITED All rights reserved  
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