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MB91267APMC PDF预览

MB91267APMC

更新时间: 2024-09-28 14:43:27
品牌 Logo 应用领域
富士通 - FUJITSU 时钟微控制器外围集成电路
页数 文件大小 规格书
56页 473K
描述
RISC Microcontroller, 32-Bit, MROM, 33MHz, CMOS, PQFP64, 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LFQFP-64

MB91267APMC 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:QFP包装说明:LQFP,
针数:64Reach Compliance Code:compliant
HTS代码:8542.31.00.01风险等级:5.51
具有ADC:YES地址总线宽度:
位大小:32最大时钟频率:12 MHz
DAC 通道:NODMA 通道:YES
外部数据总线宽度:JESD-30 代码:S-PQFP-G64
JESD-609代码:e0长度:12 mm
I/O 线路数量:48端子数量:64
最高工作温度:105 °C最低工作温度:-40 °C
PWM 通道:NO封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not QualifiedROM可编程性:MROM
座面最大高度:1.7 mm速度:33 MHz
最大供电电压:5.5 V最小供电电压:4 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.65 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:12 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

MB91267APMC 数据手册

 浏览型号MB91267APMC的Datasheet PDF文件第2页浏览型号MB91267APMC的Datasheet PDF文件第3页浏览型号MB91267APMC的Datasheet PDF文件第4页浏览型号MB91267APMC的Datasheet PDF文件第5页浏览型号MB91267APMC的Datasheet PDF文件第6页浏览型号MB91267APMC的Datasheet PDF文件第7页 
FUJITSU MICROELECTRONICS  
DATA SHEET  
DS07-16702-4Ea  
32-bit Microcontrollers  
CMOS  
FR60Lite MB91265A Series  
MB91267A/267NA/F267A/F267NA/V265A  
DESCRIPTION  
The MB91265A series is a 32-bit RISC microcontroller designed by Fujitsu Microelectronics for embedded control  
applications which require high-speed processing.  
The CPU is used the FR family* and the compatibility of FR60Lite.  
MB91267NA/F267NA loads the C-CAN (1 channel) .  
* : FR is the abbreviation of FUJITSU RISC controller.  
FEATURES  
FR60Lite CPU  
• 32-bit RISC, load/store architecture with a five-stage pipeline  
• Maximum operating frequency : 33 MHz (oscillation frequency 4.192 MHz, oscillation frequency 8-multiplier  
(PLL clock multiplication method)  
• 16-bit fixed length instructions (basic instructions)  
• Execution speed of instructions : 1 instruction per cycle  
• Memory-to-memory transfer, bit handling, barrel shift instructions, etc. : Instructions suitable for embedded  
applications  
• Function entry/exit instructions, multiple-register load/store instructions : Instructions adapted for C-language  
• Register interlock function : Facilitates coding in assembler.  
• Built-in multiplier with instruction-level support  
32-bit multiplication with sign : 5 cycles  
16-bit multiplication with sign : 3 cycles  
• Interrupt (PC, PS save) : 6 cycles, 16 priority levels  
• Harvard architecture allowing program access and data access to be executed simultaneously  
• Instruction compatible with FR family  
(Continued)  
Be sure to refer to the “Check Sheet” for the latest cautions on development.  
“Check Sheet” is seen at the following support page  
URL : http://edevice.fujitsu.com/micom/en-support/  
“Check Sheet” lists the minimal requirement items to be checked to prevent problems beforehand in system  
development.  
Copyright©2005-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved  
2007.8  

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