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MAX998EUT+ PDF预览

MAX998EUT+

更新时间: 2024-02-22 11:01:42
品牌 Logo 应用领域
美信 - MAXIM 比较器
页数 文件大小 规格书
11页 219K
描述
Comparator, 1 Func, 3000uV Offset-Max, 28ns Response Time, CMOS, PDSO6, SOT-23, 6 PIN

MAX998EUT+ 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOT-23, MO-178AB, 6 PIN针数:6
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.59
放大器类型:COMPARATOR最大平均偏置电流 (IIB):0.3 µA
25C 时的最大偏置电流 (IIB):0.3 µA最大输入失调电压:3000 µV
JESD-30 代码:R-PDSO-G6JESD-609代码:e0
长度:2.9 mm湿度敏感等级:1
功能数量:1端子数量:6
最高工作温度:85 °C最低工作温度:-40 °C
输出类型:PUSH-PULL封装主体材料:PLASTIC/EPOXY
封装代码:LSSOP封装等效代码:TSOP6,.11,37
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):245电源:3/5 V
认证状态:Not Qualified标称响应时间:28 ns
座面最大高度:1.45 mm子类别:Comparator
最大压摆率:0.65 mA供电电压上限:6 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.95 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:1.625 mm
Base Number Matches:1

MAX998EUT+ 数据手册

 浏览型号MAX998EUT+的Datasheet PDF文件第3页浏览型号MAX998EUT+的Datasheet PDF文件第4页浏览型号MAX998EUT+的Datasheet PDF文件第5页浏览型号MAX998EUT+的Datasheet PDF文件第7页浏览型号MAX998EUT+的Datasheet PDF文件第8页浏览型号MAX998EUT+的Datasheet PDF文件第9页 
Single/Dual/Quad, SOT23, Single-Supply,  
High-Speed, Low-Power Comparators  
affecting comparator operation. Likewise, do not three-  
Hysteresis  
High-speed comparators can oscillate in the linear  
operating region because of noise or undesired para-  
sitic feedback. This tends to occur when the voltage on  
one input is equal to or very close to the voltage on the  
other input. The MAX976/MAX978/MAX998 have inter-  
nal hysteresis to counter parasitic effects and noise.  
The hysteresis in a comparator creates two trip points:  
one for the rising input voltage and one for the falling  
input voltage (Figure 1). The difference between the trip  
points is the hysteresis. When the comparator input  
voltages are equal, the hysteresis effectively causes  
one comparator input voltage to move quickly past the  
other, taking the input out of the region where oscilla-  
tion occurs.  
state SHDN. Due to the output leakage currents of  
three-state devices and the small internal current for  
SHDN, three-stating this pin could also result in indeter-  
minate logic levels.  
The maximum input voltage for SHDN is 6V, referred to  
GND, and is not limited by V . This allows the use of  
CC  
5V logic to drive SHDN while V  
operates at a lower  
CC  
voltage, such as 3V. The logic threshold limits for  
SHDN are proportional to V  
Characteristics).  
(see Electrical  
CC  
_____________Applications Information  
Circuit Layout and Bypassing  
The MAX976/MAX978/MAX998 have a high-gain band-  
width and require careful board layout. We recommend  
the following design guidelines:  
Figure 1 illustrates the case where IN- has a fixed volt-  
age applied and IN+ is varied. If the inputs were  
reversed, the figure would be the same, except with an  
inverted output.  
1) Use a printed circuit board with an unbroken, low-  
inductance ground plane. Surface-mount compo-  
nents are recommended.  
Input-Stage Circuitry  
The MAX976/MAX978/MAX998 input common-mode  
2) Place a decoupling capacitor (a 0.1µF ceramic  
voltage range is from -0.2V to (V  
- 1.2V). The voltage  
CC  
capacitor is a good choice) between V  
ground as close to the pins as possible.  
and  
CC  
range for each comparator input extends to both V  
CC  
and GND. The output remains in the correct logic state  
while one or both of the inputs are within the common-  
mode range. If both input levels are out of the common-  
mode range, input-stage current saturation occurs, and  
the output becomes unpredictable.  
3) Keep lead lengths short on the inputs and outputs  
to avoid unwanted parasitic feedback around the  
comparators.  
4) Solder the devices directly to the printed circuit  
board instead of using a socket.  
Shutdown Mode  
The MAX998 features a low-power shutdown mode,  
which is activated by forcing SHDN low. Shutdown  
mode reduces the supply current to 1nA (typical), dis-  
ables the comparator, and places the output in a high-  
impedance state. Drive SHDN high to enable the  
comparator. Do not leave SHDN unconnected. Since it  
is a high-impedance input, leaving SHDN unconnected  
could result in indeterminate logic levels, adversely  
5) Minimize input impedance.  
6) For slowly varying inputs, use a small capacitor  
(~1000pF) across the inputs to improve stability.  
Additional Hysteresis  
Generate additional hysteresis with three resistors  
using positive feedback, as shown in Figure 2. This  
positive feedback method slows the hysteresis  
response time. Calculate resistor values as follows:  
1) Select R3. The leakage current of IN+ is typically  
75nA, so the current through R3 should be at least  
1.0µA to minimize errors caused by leakage current.  
V
HYST  
V
TRIP+  
The current through R3 at the trip point is (V  
-
REF  
V
+ V  
2
TRIP+  
TRIP-  
V
V
=
OS  
V
IN+  
V
) / R3. Consider the two possible output states  
OUT  
V
TRIP-  
= 0  
IN-  
when solving for R3. The two formulas are:  
R3 = V  
/ 1.0µA  
REF  
or  
CC  
V
OH  
COMPARATOR  
OUTPUT  
R3 = (V  
- V  
) / 1.0µA  
REF  
V
OL  
Use the smaller of the two resulting resistor values.  
For example, if V = 1.2V and V = 5.0V, the two  
REF  
CC  
resistor values are 1.2MΩ and 3.8MΩ. Choose a  
standard value for R3 of 1.2MΩ.  
Figure 1. Input and Output Waveforms, Noninverting Input  
Varied  
6
_______________________________________________________________________________________  

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