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MAX9326EGI-T PDF预览

MAX9326EGI-T

更新时间: 2024-09-25 13:11:07
品牌 Logo 应用领域
美信 - MAXIM 驱动时钟
页数 文件大小 规格书
11页 327K
描述
Low Skew Clock Driver, 9 True Output(s), 0 Inverted Output(s), Bipolar, 5 X 5 MM, QFN-28

MAX9326EGI-T 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:QFN包装说明:5 X 5 MM, QFN-28
针数:28Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.81
Is Samacsys:N其他特性:LVECL MODE OPERATING RANGE IS -2.375V TO -3.8V
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N28
JESD-609代码:e0长度:5 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:28实输出次数:9
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):240传播延迟(tpd):0.506 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.05 ns
座面最大高度:0.9 mm最大供电电压 (Vsup):3.8 V
最小供电电压 (Vsup):2.375 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmBase Number Matches:1

MAX9326EGI-T 数据手册

 浏览型号MAX9326EGI-T的Datasheet PDF文件第2页浏览型号MAX9326EGI-T的Datasheet PDF文件第3页浏览型号MAX9326EGI-T的Datasheet PDF文件第4页浏览型号MAX9326EGI-T的Datasheet PDF文件第5页浏览型号MAX9326EGI-T的Datasheet PDF文件第6页浏览型号MAX9326EGI-T的Datasheet PDF文件第7页 
19-2538; Rev 1; 7/02  
1:9 Differential LVPECL/LVECL/HSTL Clock and  
Data Driver  
General Description  
Features  
The MAX9326 low-skew, 1:9 differential driver features  
extremely low output-to-output skew (50ps max) and  
part-to-part skew (225ps max). These features make  
the device ideal for clock and data distribution across a  
backplane or board. The device repeats an HSTL or  
LVECL/LVPECL differential input at nine differential out-  
puts. Outputs are compatible with LVECL and LVPECL,  
and directly drive 50terminated transmission lines.  
50ps (max) Output-to-Output Skew  
1.5ps (max) Random Jitter  
RMS  
Guaranteed 300mV Differential Output at 1.0GHz  
+2.375V to +3.8V Supplies for Differential  
HSTL/LVPECL  
-2.375V to -3.8V Supplies for Differential LVECL  
On-Chip Reference for Single-Ended Inputs  
The differential inputs can be configured to accept a  
single-ended signal when the unused complementary  
input is connected to the on-chip reference output volt-  
Outputs Low for Inputs Open or at V  
Pin Compatible with MC100LVE111  
EE  
age V  
EE.  
All inputs have internal pulldown resistors to  
BB.  
V
The internal pulldowns and a fail-safe circuit  
ensure differential low default outputs when the inputs  
are left open or at V  
.
EE  
The MAX9326 operates over a +2.375V to +3.8V supply  
range for interfacing to differential HSTL and LVPECL  
signals. This allows high-performance clock or data dis-  
tribution in systems with a nominal +2.5V or +3.3V sup-  
ply. For LVECL operation, the device operates with a  
-2.375V to -3.8V supply.  
Ordering Information  
PART  
MAX9326EQI  
MAX9326ETI*  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
28 PLCC  
The MAX9326 is offered in 28-lead PLCC and space-  
saving 28-lead QFN packages. The MAX9326 is speci-  
fied for operation from -40°C to +85°C.  
28 QFN 5mm x 5mm  
*Future product—contact factory for availability.  
Applications  
Precision Clock Distribution  
Functional Diagram appears at end of data sheet.  
Low-Jitter Data Repeaters  
Pin Configurations  
TOP VIEW  
25 24 23 22 21 20 19  
Q3  
Q3  
Q4  
V
V
18  
17  
16  
15  
14  
13  
12  
EE  
26  
27  
28  
1
V
1
2
3
4
5
6
7
21 Q3  
EE  
N.C.  
CLK  
N.C.  
CLK  
20 Q3  
19 Q4  
V
CC  
CC  
MAX9326  
MAX9326  
V
CC  
18  
V
CC  
Q4  
Q5  
Q5  
CLK  
2
V
BB  
3
CLK  
17 Q4  
16 Q5  
15 Q5  
4
N.C.  
V
BB  
N.C.  
5
6
7
8
9
10 11  
PLCC  
QFN*  
*CORNER PINS AND EXPOSED PAD ARE CONNECTED TO V  
EE  
.
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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