Datasheet > MAX9121

MAX9121

更新时间： 2024-11-25 14:58:27

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亚德诺 - ADI		/
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描述
四路LVDS线接收器，内部端接，引脚按信号流向排列

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MAX9121 数据手册

19-1909; Rev 0; 6/01

Quad LVDS Line Receivers with

Integrated Termination and Flow-Through Pinout

General Description

____________________________Features

The MAX9121/MAX9122 quad low-voltage differential sig-

naling (LVDS) differential line receivers are ideal for appli-

cations requiring high data rates, low power, and low

noise. The MAX9121/MAX9122 are guaranteed to receive

data at speeds up to 500Mbps (250MHz) over controlled-

impedance media of approximately 100Ω. The transmis-

sion media may be printed circuit (PC) board traces or

cables.

ꢀ Integrated Termination Eliminates Four External

Resistors (MAX9122)

ꢀ Flow-Through Pinout

Simplifies PC Board Layout

Reduces Crosstalk

ꢀ Pin Compatible with DS90LV048A

ꢀ Guaranteed 500Mbps Data Rate

ꢀ 300ps Pulse Skew (max)

The MAX9121/MAX9122 accept four LVDS differential

inputs and translate them to LVCMOS outputs. The

MAX9122 features integrated parallel termination resis-

tors (nominally 107Ω), which eliminate the requirement

for four discrete termination resistors and reduce stub

lengths. The MAX9121 inputs are high impedance and

require an external termination resistor when used in a

point-to-point connection.

ꢀ Conform to ANSI TIA/EIA-644 LVDS Standard

ꢀ Single +3.3V Supply

ꢀ Fail-Safe Circuit

Ordering Information

The devices support a wide common-mode input range of

0.05V to 2.35V, allowing for ground potential differences

and common-mode noise between the driver and the

receiver. A fail-safe feature sets the output high when the

inputs are open, or when the inputs are undriven and

shorted or parallel terminated. The EN and EN inputs con-

trol the high-impedance output. The enables are common

to all four receivers. Inputs conform to the ANSI TIA/EIA-

644 LVDS standard. Flow-through pinout simplifies PC

board layout and reduces crosstalk by separating the

LVDS inputs and LVCMOS outputs. The MAX9121/

MAX9122 operate from a single +3.3V supply, and are

specified for operation from -40°C to +85°C. These

devices are available in 16-pin TSSOP and SO packages.

Refer to the MAX9123 data sheet for a quad LVDS line dri-

ver with flow-through pinout.

PART

TEMP. RANGE

-40°C to +85°C

PIN-PACKAGE

16 TSSOP

16 SO

16 TSSOP

16 SO

MAX9121EUE

MAX9121ESE

MAX9122EUE

MAX9122ESE

Pin Configuration appears at end of data sheet.

Typical Application Circuit

LVDS SIGNALS

107Ω

Applications

Digital Copiers

Laser Printers

Cellular Phone Base Stations

Add/Drop Muxes

LVTTL/LVCMOS

DATA INPUT

LVTTL/LVCMOS

DATA OUTPUT

Digital Cross-Connects

DSLAMs

Network Switches/Routers

Backplane Interconnect

Clock Distribution

MAX9122

100Ω SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES

MAX9123

________________________________________________________________ Maxim Integrated Products

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

12 3 4 5 6 7...12

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与MAX9121相关器件

型号	品牌	获取价格	描述	数据表
MAX9121ESE	MAXIM	获取价格	Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
MAX9121ESE+	MAXIM	获取价格	Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, 0.150 INCH, SOIC-16
MAX9121ESE-T	MAXIM	获取价格	Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, 0.150 INCH, SOIC-16
MAX9121EUE	MAXIM	获取价格	Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
MAX9121EUE+	MAXIM	获取价格	Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, 4.40 MM, TSSOP-16
MAX9121EUE+T	MAXIM	获取价格	Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, 4.40 MM, TSSOP-16
MAX9121EUE-T	MAXIM	获取价格	暂无描述
MAX9121EVKIT	MAXIM	获取价格	Evaluation Kit for the MAX9121/MAX9122/MAX9123
MAX9122	MAXIM	获取价格	Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout
MAX9122	ADI	获取价格	四路LVDS线接收器，内部端接，引脚按信号流向排列

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