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MAX9121ESE+ PDF预览

MAX9121ESE+

更新时间: 2024-10-03 13:11:11
品牌 Logo 应用领域
美信 - MAXIM /
页数 文件大小 规格书
12页 232K
描述
Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, 0.150 INCH, SOIC-16

MAX9121ESE+ 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP,针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.69
输入特性:DIFFERENTIAL接口集成电路类型:LINE RECEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
湿度敏感等级:1功能数量:4
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
认证状态:Not Qualified最大接收延迟:2.7 ns
接收器位数:4座面最大高度:1.75 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

MAX9121ESE+ 数据手册

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19-1909; Rev 0; 6/01  
Quad LVDS Line Receivers with  
Integrated Termination and Flow-Through Pinout  
General Description  
____________________________Features  
The MAX9121/MAX9122 quad low-voltage differential sig-  
naling (LVDS) differential line receivers are ideal for appli-  
cations requiring high data rates, low power, and low  
noise. The MAX9121/MAX9122 are guaranteed to receive  
data at speeds up to 500Mbps (250MHz) over controlled-  
impedance media of approximately 100. The transmis-  
sion media may be printed circuit (PC) board traces or  
cables.  
Integrated Termination Eliminates Four External  
Resistors (MAX9122)  
Flow-Through Pinout  
Simplifies PC Board Layout  
Reduces Crosstalk  
Pin Compatible with DS90LV048A  
Guaranteed 500Mbps Data Rate  
300ps Pulse Skew (max)  
The MAX9121/MAX9122 accept four LVDS differential  
inputs and translate them to LVCMOS outputs. The  
MAX9122 features integrated parallel termination resis-  
tors (nominally 107), which eliminate the requirement  
for four discrete termination resistors and reduce stub  
lengths. The MAX9121 inputs are high impedance and  
require an external termination resistor when used in a  
point-to-point connection.  
Conform to ANSI TIA/EIA-644 LVDS Standard  
Single +3.3V Supply  
Fail-Safe Circuit  
Ordering Information  
The devices support a wide common-mode input range of  
0.05V to 2.35V, allowing for ground potential differences  
and common-mode noise between the driver and the  
receiver. A fail-safe feature sets the output high when the  
inputs are open, or when the inputs are undriven and  
shorted or parallel terminated. The EN and EN inputs con-  
trol the high-impedance output. The enables are common  
to all four receivers. Inputs conform to the ANSI TIA/EIA-  
644 LVDS standard. Flow-through pinout simplifies PC  
board layout and reduces crosstalk by separating the  
LVDS inputs and LVCMOS outputs. The MAX9121/  
MAX9122 operate from a single +3.3V supply, and are  
specified for operation from -40°C to +85°C. These  
devices are available in 16-pin TSSOP and SO packages.  
Refer to the MAX9123 data sheet for a quad LVDS line dri-  
ver with flow-through pinout.  
PART  
TEMP. RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
16 TSSOP  
16 SO  
16 TSSOP  
16 SO  
MAX9121EUE  
MAX9121ESE  
MAX9122EUE  
MAX9122ESE  
Pin Configuration appears at end of data sheet.  
Typical Application Circuit  
LVDS SIGNALS  
T
T
T
T
107  
107Ω  
107Ω  
107Ω  
R
R
R
R
X
X
X
X
X
X
X
X
Applications  
Digital Copiers  
Laser Printers  
Cellular Phone Base Stations  
Add/Drop Muxes  
LVTTL/LVCMOS  
DATA INPUT  
LVTTL/LVCMOS  
DATA OUTPUT  
Digital Cross-Connects  
DSLAMs  
Network Switches/Routers  
Backplane Interconnect  
Clock Distribution  
MAX9122  
100SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES  
MAX9123  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  

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