4 0 0 MHz t o 2 .5 GHz, Lo w -No is e ,
S iGe Do w n c o n ve rt e r Mix e rs
P o w e r-S u p p ly La yo u t
To minimize coupling between different sections of the
IC, the ideal power-supply layout is a star configuration
Table 3. IFOUT Port Impedance
FREQUENCY
PART
with a large decoupling capacitor at a central V
CC
45MHz
960-j372
934-j373
670-j216
70MHz
240MHz
186-j397
161-j375
175-j296
nod e . The V
tra c e s b ra nc h out from this c e ntra l
CC
node, each going to a separate V node on the PC
MAX2680
MAX2681
MAX2682
803-j785
746-j526
578-j299
CC
board. At the end of each trace is a bypass capacitor
that has low ESR at the RF frequency of operation. This
arrangement provides local decoupling at the V pin.
CC
At high frequencies, any signal leaking out of one sup-
ply pin sees a relatively high impedance (formed by the
V
trace inductance) to the central V node, and an
CC
CC
Table 4. IF Output Impedance-Matching
Components
even higher impedance to any other supply pin, as well
as a low impedance to ground through the bypass
capacitor.
FREQUENCY
MATCHING
Im p e d a n c e -Ma t c h in g Ne t w o rk La yo u t
The RFIN and IFOUT impedance-matching networks are
very sensitive to layout-related parasitics. To minimize
parasitic inductance, keep all traces short and place
components as close as possible to the chip. To mini-
mize parasitic capacitance, use cutouts in the ground
plane (and any other plane) below the matching network
components. However, avoid cutouts that are larger
than necessary since they act as aperture antennas.
COMPONENT
45MHz
390nH
39pF
70MHz
330nH
15pF
240MHz
82nH
3pF
L1
C2
R1
250Ω
Open
Open
01/MAX682
Typ ic a l Op e ra t in g Circ u it
C1
LO
INPUT
1
2
6
SHUTDOWN
CONTROL
SHDN
LO
C3
MAX2680
MAX2681
MAX2682
5
4
V
CC
V
CC
GND
+2.7V TO +5.5V
C4
1000pF
C5
10µF
R1
L1
Z
2
Z
1
RF
IF
OUTPUT
3
RFIN
IFOUT
INPUT
C2
Z
3
THE VALUES OF MATCHING COMPONENTS C2, L1, R1, Z1, Z2, AND Z3 DEPEND ON THE IF AND RF FREQUENCY AND DOWNCONVERTER. SEE TABLES 2 AND 4.
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