MAX20335
PMIC with Ultra-Low I Voltage Regulators and
Q
Battery Chargers for Small Lithium Ion Systems
Absolute Maximum Ratings
(Voltages referenced to GND.)
SDA, SCL, THM, RST, SYS, PFN1, PFN2,
MPC0, MPC1, INT, MON, BAT, LED,
L1IN, L2IN, L3IN.............................................. -0.3V to +6.0V
Continuous Current into CHGIN, BAT, SYS ................±1000mA
Continuous Current into any other terminal ..................±100mA
Continuous Power Dissipation (multilayer board at +70°C):
6 x 6 Array 36-Bump 2.72mm x 2.47mm
B1LX, B2LX, B1OUT, B2OUT, EXT ...... -0.3V to (V
+ 0.3V)
+ 0.3V)
+ 0.3V)
+ 0.3V)
0.4mm Pitch WLP (derate 21.70mW/°C).......................1.74W
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Soldering Temperature (reflow).......................................+260°C
SYS
L1IN
L2IN
L3IN
L1OUT................................................... -0.3V to (V
L2OUT................................................... -0.3V to (V
L3OUT................................................... -0.3V to (V
CHGIN .................................................................... -6V to +30V
CAP ................................... -0.3V to min (|V | + 0.3V, +6V)
CHGIN
SET .......................................................... -0.3V to V
+ 0.3V
BAT
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any
other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
Package Information
PACKAGE TYPE: 36 WLP
Package Code
W362D2+1
Outline Number
21-0897
Land Pattern Number
Refer to Application Note 1891
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
46°C/W
JA
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
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