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MAX1124

更新时间： 2024-09-16 14:57:23
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器
页数 文件大小 规格书
17页 233K
描述
1.8V、10位、250Msps模数转换器，LVDS输出，适用于宽带系统

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MAX1124 数据手册

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19-3029; Rev 2; 8/08  
1.8V, 10-Bit, 250Msps Analog-to-Digital Converter  
with LVDS Outputs for Wideband Applications  
MAX124  
General Description  
Features  
The MAX1124 is a monolithic 10-bit, 250Msps analog-  
to-digital converter (ADC) optimized for outstanding  
dynamic performance at high IF frequencies up to  
500MHz. The product operates with conversion rates of  
up to 250Msps while consuming only 477mW.  
♦ 250Msps Conversion Rate  
♦ SNR = 56.8dB/55.5dB at f = 100MHz/500MHz  
IN  
♦ SFDR = 71dBc/63.8dBc at f = 100MHz/500MHz  
IN  
♦ NPR = 54.8dB at f  
= 28.8MHz  
NOTCH  
At 250Msps and an input frequency of 100MHz, the  
MAX1124 achieves a spurious-free dynamic range  
(SFDR) of 71dBc. Its excellent signal-to-noise ratio  
(SNR) of 57.1dB at 10MHz remains flat (within 1dB) for  
input tones up to 500MHz. This makes the MAX1124  
ideal for wideband applications such as digital predis-  
tortion in cellular base-station transceiver systems.  
♦ Single 1.8V Supply  
♦ 477mW Power Dissipation at 250Msps  
♦ On-Chip Track-and-Hold and Internal Reference  
♦ On-Chip Selectable Divide-by-2 Clock Input  
♦ LVDS Digital Outputs with Data Clock Output  
♦ Evaluation Kit Available (Order MAX1124EVKIT)  
The MAX1124 requires a single 1.8V supply. The ana-  
log input is designed for either differential or single-  
ended operation and can be AC- or DC-coupled. The  
ADC also features a selectable on-chip divide-by-2  
clock circuit, which allows the user to apply clock fre-  
quencies as high as 500MHz. This helps to reduce the  
phase noise of the input clock source. A differential  
LVDS sampling clock is recommended for best perfor-  
mance. The converter’s digital outputs are LVDS com-  
patible, and the data format can be selected to be  
either two’s complement or offset binary.  
Ordering Information  
PART  
TEMP RANGE  
PIN-PACKAGE  
MAX1124EGK  
-40°C to +85°C  
68 QFN-EP*  
*EP = Exposed pad.  
The MAX1124 is available in a 68-pin QFN with  
exposed pad (EP) and is specified over the industrial  
(-40°C to +85°C) temperature range.  
Pin Configuration  
For pin-compatible, lower speed versions of the  
MAX1124, refer to the MAX1122 (170Msps) and the  
MAX1123 (210Msps) data sheets. For a pin-compatible  
8-bit version of the MAX1124, refer to the MAX1121  
data sheet.  
TOP VIEW  
68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52  
AV  
1
2
3
4
5
6
7
8
9
51 D6P  
50 D6N  
49 D5P  
48 D5N  
47 D4P  
46 D4N  
45 OGND  
Applications  
Wireless and Wired Broadband Communication  
CC  
EP  
AGND  
REFIO  
REFADJ  
AGND  
Cable-Head End Systems  
AV  
CC  
Digital Predistortion Receivers  
AGND  
INP  
Communications Test Equipment  
44 OV  
CC  
INN  
43 DCLKP  
42 DCLKN  
MAX1124  
Radar and Satellite Subsystems Antenna Array  
Processing  
AGND 10  
AV  
AV  
AV  
AV  
11  
12  
13  
14  
41 OV  
CC  
CC  
CC  
CC  
CC  
40 D3P  
39 D3N  
38 D2P  
37 D2N  
36 D1P  
35 D1N  
AGND 15  
AGND 16  
CLKDIV 17  
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34  
________________________________________________________________ Maxim Integrated Products  
1
For pricing delivery, and ordering information please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
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