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M5M44800CJ-6ST PDF预览

M5M44800CJ-6ST

更新时间: 2024-11-21 13:10:07
品牌 Logo 应用领域
三菱 - MITSUBISHI 存储内存集成电路光电二极管动态存储器
页数 文件大小 规格书
21页 204K
描述
Fast Page DRAM, 512KX8, 60ns, CMOS, PDSO28, 0.400 INCH, 1.27 MM PITCH, PLASTIC, SOJ-28

M5M44800CJ-6ST 技术参数

生命周期:Obsolete零件包装代码:SOJ
包装说明:SOJ,针数:28
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.4
访问模式:FAST PAGE最长访问时间:60 ns
其他特性:RAS ONLY/CAS BEFORE RAS/HIDDEN/SELF REFRESHJESD-30 代码:R-PDSO-J28
长度:18.41 mm内存密度:4194304 bit
内存集成电路类型:FAST PAGE DRAM内存宽度:8
功能数量:1端口数量:1
端子数量:28字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:SOJ
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
认证状态:Not Qualified刷新周期:1024
座面最大高度:3.55 mm自我刷新:YES
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:DUAL宽度:10.16 mm
Base Number Matches:1

M5M44800CJ-6ST 数据手册

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M5M44800CJ,TPM-I5TS,U-B6ISH,I-L7SI,s  
-5S,-6S,-7S  
FASTPAGEMODE4194304-BIT(524288-WORDBY8-BIT)DYNAMICRAM
DESCRIPTION  
PIN CONFIGURATION (TOP VIEW)  
This is a family of 524288-word by 8-bit dynamic RAMs, fabricated  
with the high performance CMOS process, and is ideal for large-  
capacity memory systems where high speed, low power  
dissipation, and low costs are essential.  
The use of double-layer metalization process technology and a  
single-transistor dynamic storage stacked capacitor cell provide  
high circuit density at reduced costs. Multiplexed address inputs  
VSS(0V)  
(5V)VCC  
1
2
3
4
5
6
7
8
9
28  
27 DQ8  
26 DQ7  
25 DQ6  
DQ1  
DQ2  
DQ3  
DQ4  
NC  
permit both  
a reduction in pins and an increase in system  
densities. Self or extended refresh current is low enough for  
battery back-up application.  
DQ5  
24  
23 CAS  
22 OE  
W
RAS  
A9  
NC  
A8  
21  
20  
FEATURES  
RAS  
CAS Address  
OE  
Power  
dissipa-  
tion  
A7  
A0  
A1  
10  
11  
12  
13  
19  
18  
17  
16  
15  
Cycle  
time  
(min.ns) (typ.mW)  
access access access access  
Type name  
A6  
time  
time  
time  
time  
(max.ns)  
(max.ns) (max.ns)  
(max.ns)  
A2  
A3  
A5  
M5M44800CXX-5,-5S  
M5M44800CXX-6,-6S  
M5M44800CXX-7,-7S  
XX=J,TP  
50  
60  
70  
13  
15  
20  
25  
30  
35  
13  
15  
20  
90  
110  
130  
450  
375  
325  
A4  
(5V)VCC 14  
VSS(0V)  
Outline 28P0K(400mil SOJ)  
Standard 28pin SOJ, 28pin TSOP (II)  
Single 5V±10% supply  
Low stand-by power dissipation  
CMOS lnput level  
CMOS Input level  
Operating power dissipation  
M5M44800Cxx-5,-5S  
M5M44800Cxx-6,-6S  
M5M44800Cxx-7,-7S  
Self refresh capability *  
Self refresh current  
Extended refresh capability  
Extended refresh current  
VSS(0V)  
(5V)VCC  
1
2
3
4
5
6
7
8
9
28  
27  
26  
25  
5.5mW (Max)  
550µW (Max) *  
DQ8  
DQ7  
DQ6  
DQ5  
DQ1  
DQ2  
DQ3  
495mW (Max)  
413mW (Max)  
358mW (Max)  
DQ4  
NC  
24  
23 CAS  
150µA(Max)  
150µA(Max)  
OE  
NC  
A8  
22  
21  
20  
W
RAS  
A9  
A0  
A1  
Fast page mode(1024-column random access),Read-modify-write,  
RAS-only refresh, CAS before RAS refresh, Hidden refresh  
capabilities.  
Early-write mode, CAS and OE to control output buffer impedance  
1024 refresh cycles every 16.4ms (A0 ~A9)  
A7  
10  
11  
12  
13  
19  
18  
17  
16  
15  
A6  
A2  
A3  
A5  
A4  
1024 refresh cycles every 128ms (A0 ~A9) *  
*
:Applicable to self refresh version (M5M44800CJ,TP-5S,-6S,-7S  
:option) only  
(5V)VCC 14  
VSS(0V)  
Outline 28P3Y-H(400mil TSOP Normal Bend)  
APPLICATION  
Microcomputer memory, Refresh memory for CRT  
NC:NO CONNECTION  
PIN DESCRIPTION  
Pin name  
A0~A9  
DQ1~DQ8  
RAS  
Function  
Address inputs  
Data inputs/outputs  
Row address strobe input  
Column address strobe input  
Write control input  
CAS  
W
Output enable input  
Power supply (+5V)  
Ground (0V)  
OE  
Vcc  
Vss  
1
M5M44800CJ,TP-5,-5S:Under development  

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