Datasheet > M54HC534F1R

M54HC534F1R

更新时间： 2024-11-15 22:13:27

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		触发器输出元件
页数	文件大小	规格书
13页	273K
描述
OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HC374 NON INVERTING - HC534 INVERTING

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中文翻译

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技术参数
数据手册

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M54HC534F1R 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP, DIP20,.3	针数：	20
Reach Compliance Code：	not_compliant	HTS代码：	8542.39.00.01
风险等级：	5.38	系列：	HC/UH
JESD-30 代码：	R-GDIP-T20	JESD-609代码：	e0
负载电容（CL）：	150 pF	逻辑集成电路类型：	BUS DRIVER
最大频率@ Nom-Sup：	21000000 Hz	最大I（ol）：	0.006 A
位数：	8	功能数量：	1
端口数量：	2	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出特性：	3-STATE	输出极性：	INVERTED
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装等效代码：	DIP20,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	2/6 V	传播延迟（tpd）：	57 ns
认证状态：	Not Qualified	座面最大高度：	5.71 mm
子类别：	FF/Latches	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	CMOS
温度等级：	MILITARY	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
触发器类型：	POSITIVE EDGE	宽度：	7.62 mm
Base Number Matches：	1

M54HC534F1R 数据手册

M54/74HC374

M54/74HC534

OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT

HC374 NON INVERTING - HC534 INVERTING

HIGH SPEED

_MAX= 77 MHz (TYP.) AT V_CC= 5 V

LOW POWER DISSIPATION

I_CC= 4 µA (MAX.) AT T_A= 25 °C

HIGH NOISE IMMUNITY

_NIH= V_NIL= 28 % V_CC(MIN)

OUTPUT DRIVE CAPABILITY

15 LSTTL LOADS

SYMMETRICAL OUTPUT IMPEDANCE

I_OL= I_OH= 6 mA (MIN.)

BALANCED PROPAGATION DELAYS

t_PLH= t_PHL

WIDE OPERATING VOLTAGE RANGE

V_CC(OPR) = 2 V TO 6 V

B1R

(Plastic Package)

F1R

(Ceramic Package)

M1R

(Micro Package)

C1R

(Chip Carrier)

PIN AND FUNCTION COMPATIBLE

WITH 54/74LS374/534

ORDER CODES :

M54HCXXXF1R

M74HCXXXB1R

M74HCXXXM1R

M74HCXXXC1R

DESCRIPTION

The M54/74HC374, M54/74HC534, are high speed

CMOS OCTAL D-TYPEFLIP FLOP WITH3-STATE

OUTPUTS fabricated with in silicon gate C²MOS

technology. They have the same high speed per-

formance of LSTTL combined with true CMOS low

power comsuption. These8-bit D-type flip-flops are

controlled by a clockinput(CK) and anouputenable

input (OE). On thepositive transition of theclock, the

Q outputs willbesetto thelogic statethatweresetup

at the D inputs (HC374) or their complements

(HC534).

while high level, the outputs will be in a high imped-

ance state. The output control does notaffect the in-

ternal operation of flip-flops. That is, theold data can

be retained or the new data can be entered even

while the outputs are off. The application engineer

has a choice of combination of inverting and non-in-

verting outputs. The HC374 and HC574 are identi-

cal, apart from pin layout. The 3-state output

configuration and the wide choice of outline make

bus-organized systems simple. All inputs are

equipped with protection circuits against static dis-

charge and transient excess voltage.

While the OE input is low, the eight outputs will be

in a normal logic state (high or low logic level), and

PIN CONNECTION (top view)

March 1993

1/13

12 3 4 5 6 7...13

中文翻译

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与M54HC534F1R相关器件

型号	品牌	获取价格	描述	数据表
M54HC534M1R	STMICROELECTRONICS	获取价格	OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT HC374 NON INVERTING - HC534 INVERTING
M54HC540	STMICROELECTRONICS	获取价格	OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M54HC540_04	STMICROELECTRONICS	获取价格	RAD-HARD OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
M54HC540B1R	STMICROELECTRONICS	获取价格	OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M54HC540C1R	STMICROELECTRONICS	获取价格	OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M54HC540D	STMICROELECTRONICS	获取价格	RAD-HARD OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
M54HC540D1	STMICROELECTRONICS	获取价格	RAD-HARD OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)
M54HC540F1	STMICROELECTRONICS	获取价格	HC/UH SERIES, 8-BIT DRIVER, INVERTED OUTPUT, CDIP20, FRIT SEALED, CERAMIC, DIP-20
M54HC540F1R	STMICROELECTRONICS	获取价格	OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED
M54HC540K	STMICROELECTRONICS	获取价格	RAD-HARD OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (INVERTED)

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