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M54HC541 PDF预览

M54HC541

更新时间: 2024-11-15 22:57:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 输出元件
页数 文件大小 规格书
12页 268K
描述
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS HC540: INVERTED - HC541 NON INVERTED

M54HC541 数据手册

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M54HC540/541  
M74HC540/541  
OCTAL BUS BUFFER WITH 3 STATE OUTPUTS  
HC540: INVERTED - HC541 NON INVERTED  
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HIGH SPEED  
PD = 10 ns (TYP.) at VCC = 5V  
LOW POWER DISSIPATION  
ICC = 4 µA (MAX.) at TA = 25 oC  
HIGH NOISE IMMUNITY  
t
V
NIH = VINL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
15 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 6 mA (MIN)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
VCC (OPR) = 2V to 6V  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
PIN AND FUNCTION COMPATIBLE  
WITH 54/74LS540/541  
ORDER CODES :  
M54HCXXXF1R  
M74HCXXXB1R  
M74HCXXXM1R  
M74HCXXXC1R  
DESCRIPTION  
The M54/74HC540 and HC541 are high speed  
CMOS OCTAL BUS BUFFERS (3-STATE)  
fabricated in silicon gate C2MOS technology. They  
have the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
The HC540isaninverting buffer andHC541 isa non  
inverting buffer.  
enhance PC board layout, the HC540 and HC541  
offers a pinout having inputs and outputs on  
opposite sides of the package.  
All inputs are equipped with protection circuits  
against static discharge and transient excess  
voltage.  
The 3 STATE control gate operates as a two input  
AND such that if either G1 and G2 are high, all eight  
output are in the high impedance state. In order to  
PIN CONNECTION (top view)  
HC540  
HC541  
October 1993  
1/12  

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