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M50FW002 PDF预览

M50FW002

更新时间: 2024-11-05 22:07:27
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意法半导体 - STMICROELECTRONICS 闪存
页数 文件大小 规格书
39页 254K
描述
2 Mbit 256Kb x8, Boot Block 3V Supply Firmware Hub Flash Memory

M50FW002 数据手册

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M50FW002  
2 Mbit (256Kb x8, Boot Block)  
3V Supply Firmware Hub Flash Memory  
PRELIMINARY DATA  
FEATURES SUMMARY  
SUPPLY VOLTAGE  
Figure 1. Packages  
– V = 3 V to 3.6 V for Program, Erase and  
CC  
Read Operations  
– V = 12 V for Fast Program and Fast Erase  
PP  
(optional)  
TWO INTERFACES  
– Firmware Hub (FWH) Interface for embedded  
operation with PC Chipsets  
– Address/Address Multiplexed (A/A Mux)  
Interface for programming equipment  
compatibility  
FIRMWARE HUB (FWH) HARDWARE  
INTERFACE MODE  
PLCC32 (K)  
– 5 Signal Communication Interface supporting  
Read and Write Operations  
– Hardware Write Protect Pins for Block  
Protection  
– Register Based Read and Write Protection  
– 5 Additional General Purpose Inputs for  
platform design flexibility  
– Synchronized with 33MHz PCI clock  
– Multi-byte Read Operation (1-byte, 16-byte,  
32-byte)  
PROGRAMMING TIME  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
– Device Code: 29h  
– 10 µs typical  
– Quadruple Byte Programming Option  
7 MEMORY BLOCKS  
– 1 Boot Block (Top Location)  
– 4 Main Blocks and 2 Parameter Blocks  
PROGRAM/ERASE CONTROLLER  
– Embedded Byte Program, Block Erase and  
Chip Erase algorithms  
– Status Register Bits  
PROGRAM and ERASE SUSPEND  
FOR USE in PC BIOS APPLICATIONS  
May 2002  
1/39  
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.  

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