5秒后页面跳转
M38510/65304B2A PDF预览

M38510/65304B2A

更新时间: 2024-11-04 12:36:19
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路
页数 文件大小 规格书
19页 855K
描述
DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET

M38510/65304B2A 技术参数

是否无铅: 含铅生命周期:Obsolete
零件包装代码:QFN包装说明:QCCN, LCC20,.35SQ
针数:20Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.49
Is Samacsys:N系列:HC/UH
JESD-30 代码:S-XQCC-N20JESD-609代码:e0
长度:8.89 mm逻辑集成电路类型:J-K FLIP-FLOP
位数:2功能数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出极性:COMPLEMENTARY
封装主体材料:UNSPECIFIED封装代码:QCCN
封装等效代码:LCC20,.35SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):NOT APPLICABLE
电源:2/6 V传播延迟(tpd):41 ns
认证状态:Not Qualified筛选级别:MIL-M-38510
座面最大高度:2.03 mm子类别:FF/Latch
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT APPLICABLE触发器类型:POSITIVE EDGE
宽度:8.89 mm最小 fmax:23 MHz
Base Number Matches:1

M38510/65304B2A 数据手册

 浏览型号M38510/65304B2A的Datasheet PDF文件第2页浏览型号M38510/65304B2A的Datasheet PDF文件第3页浏览型号M38510/65304B2A的Datasheet PDF文件第4页浏览型号M38510/65304B2A的Datasheet PDF文件第5页浏览型号M38510/65304B2A的Datasheet PDF文件第6页浏览型号M38510/65304B2A的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢉ ꢀꢁꢊ ꢃꢄ ꢅꢆ ꢇꢈ  
ꢋꢌꢍ ꢎ ꢏ ꢐꢑ ꢒꢓ ꢀꢔ ꢕ ꢔꢖꢗ ꢐꢗꢋꢘ ꢗꢐꢕ ꢙꢔ ꢘ ꢘ ꢗꢙ ꢗ ꢋ  
ꢚ ꢎꢔ ꢒꢐꢚ ꢎ ꢓ ꢒꢀ ꢛ ꢔꢕ ꢄ ꢅꢎ ꢗꢍꢙ ꢍꢁꢋ ꢒ ꢙꢗ ꢀ ꢗꢕ  
SCLS470A − MARCH 2003 − REVISED OCTOBER 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
Low Power Consumption, 40-µA Max I  
Typical t = 12 ns  
pd  
4-mA Output Drive at 5 V  
CC  
Low Input Current of 1 µA Max  
High-Current Outputs Drive Up To  
10 LSTTL Loads  
SN54HC109 . . . J OR W PACKAGE  
SN74HC109 . . . D, N, OR NS PACKAGE  
(TOP VIEW)  
SN54HC109 . . . FK PACKAGE  
(TOP VIEW)  
1CLR  
1J  
V
CC  
15 2CLR  
14 2J  
1
2
3
4
5
6
7
8
16  
3
2
1 20 19  
18  
1K  
1K  
1CLK  
NC  
4
5
6
7
8
2J  
13  
12  
11  
10  
9
1CLK  
1PRE  
1Q  
2K  
17  
16  
15  
14  
2K  
2CLK  
2PRE  
2Q  
NC  
1PRE  
1Q  
2CLK  
2PRE  
1Q  
9 10 11 12 13  
GND  
2Q  
NC − No internal connection  
description/ordering information  
These devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset (PRE)  
or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR  
are inactive (high), data at the J and K inputs meeting the setup-time requirements are transferred to the outputs  
on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not related  
directly to the rise time of the clock pulse. Following the hold-time interval, data at the J and K inputs can be  
changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by  
grounding K and tying J high. They also can perform as D-type flip-flops if J and K are tied together.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
SOIC − D  
Tube of 25  
Tube of 40  
Reel of 2500  
Reel of 250  
Reel of 2000  
Tube of 25  
Tube of 150  
Tube of 55  
SN74HC109N  
SN74HC109D  
SN74HC109DR  
SN74HC109DT  
SN74HC109NSR  
SNJ54HC109J  
SNJ54HC109W  
SNJ54HC109FK  
SN74HC109N  
−40°C to 85°C  
HC109  
SOP − NS  
CDIP − J  
HC109  
SNJ54HC109J  
SNJ54HC109W  
SNJ54HC109FK  
−55°C to 125°C  
CFP − W  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢓ ꢝ ꢨ ꢠ ꢟꢫ ꢦꢥ ꢣꢤ ꢥꢟ ꢡꢨ ꢪꢜ ꢢꢝ ꢣ ꢣꢟ ꢲꢔ ꢎꢐ ꢒꢙ ꢚ ꢐꢳꢴꢂ ꢳꢂꢉ ꢢꢪꢪ ꢨꢢ ꢠ ꢢ ꢡꢧ ꢣꢧꢠ ꢤ ꢢ ꢠ ꢧ ꢣꢧ ꢤꢣꢧ ꢫ  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
ꢦ ꢝꢪ ꢧꢤꢤ ꢟ ꢣꢭꢧ ꢠ ꢯꢜ ꢤꢧ ꢝ ꢟꢣꢧ ꢫꢬ ꢓ ꢝ ꢢꢪ ꢪ ꢟ ꢣꢭꢧ ꢠ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢤ ꢉ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢜꢟ ꢝ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与M38510/65304B2A相关器件

型号 品牌 获取价格 描述 数据表
M38510/65304B2X TI

获取价格

HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CQCC20
M38510/65304BEA TI

获取价格

DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
M38510/65304BEX ACTEL

获取价格

HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
M38510/65305BEA TI

获取价格

具有清零和预置端的双路负边沿触发式 J-K 触发器 | J | 16 | -55 to 1
M38510/65305BEX ACTEL

获取价格

HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
M38510/65306B2X ACTEL

获取价格

IC HC/UH SERIES, QUAD POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, QCC20, 0.350 X 0.3
M38510/65306BFX ACTEL

获取价格

IC HC/UH SERIES, QUAD POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, DFP16, 0.250 X 0.3
M38510/65306SFX TI

获取价格

HC/UH SERIES, QUAD POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, DFP16, 0.250 X 0.375
M38510/65307BEA TI

获取价格

具有清零端的六路 D 型触发器 | J | 16 | -55 to 125
M38510/65308BEA TI

获取价格

具有清零端的四路 D 型触发器 | J | 16 | -55 to 125