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M29F002NT-70P1 PDF预览

M29F002NT-70P1

更新时间: 2024-02-13 21:34:08
品牌 Logo 应用领域
恒忆 - NUMONYX 可编程只读存储器光电二极管内存集成电路
页数 文件大小 规格书
29页 233K
描述
256KX8 FLASH 5V PROM, 70ns, PDIP32, 0.600 INCH, PLASTIC, DIP-32

M29F002NT-70P1 技术参数

是否Rohs认证: 不符合生命周期:Transferred
零件包装代码:DIP包装说明:DIP, DIP32,.6
针数:32Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.28最长访问时间:70 ns
其他特性:20 YEARS DATA RETENTION; 100000 PROGRAM/ERASE CYCLES; TOP BOOT BLOCK启动块:TOP
命令用户界面:YES数据轮询:YES
数据保留时间-最小值:20耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PDIP-T32JESD-609代码:e0
长度:41.91 mm内存密度:2097152 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:1,2,1,3
端子数量:32字数:262144 words
字数代码:256000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:256KX8封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP32,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL电源:5 V
编程电压:5 V认证状态:Not Qualified
座面最大高度:5.08 mm部门规模:16K,8K,32K,64K
最大待机电流:0.0001 A子类别:Flash Memories
最大压摆率:0.02 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL切换位:YES
类型:NOR TYPE宽度:15.24 mm
Base Number Matches:1

M29F002NT-70P1 数据手册

 浏览型号M29F002NT-70P1的Datasheet PDF文件第4页浏览型号M29F002NT-70P1的Datasheet PDF文件第5页浏览型号M29F002NT-70P1的Datasheet PDF文件第6页浏览型号M29F002NT-70P1的Datasheet PDF文件第8页浏览型号M29F002NT-70P1的Datasheet PDF文件第9页浏览型号M29F002NT-70P1的Datasheet PDF文件第10页 
M29F002T, M29F002NT, M29F002B  
Write. Write operations are used to give Instruction  
Commands to the memory or to latch input data to  
be programmed.A write operation is initiated when  
Chip Enable E is Low and Write Enable W is Low  
with Output Enable G High. Addresses are latched  
on the falling edge of W or E whichever occurs last.  
Commands and InputData are latched on the rising  
edge of W or E whichever occurs first.  
protected in order to change stored data. The tem-  
porary unprotection mode is activated by bringing  
RPNC to VID. During the temporary unprotection  
mode the previously protected blocks are unpro-  
tected. A block can be selected and data can be  
modified by executing the Erase or Program in-  
struction with the RPNC signal held at VID. When  
RPNC is returned to VIH, all the previously pro-  
tected blocks are again protected.  
Block Unprotection. All protected blocks can be  
unprotected on programming equipment to allow  
updating of bit contents. All blocks must first be  
protected before the unprotection operation. Block  
unprotection is activated when A9, G and E are at  
VID and A12, A15 at VIH. The Block Unprotection  
algorithm is shown in Figure 15. Unprotection is  
initiated by the edge of W falling to VIL.After a delay  
of 10ms, the unprotection operation is ended by  
rising W to VIH. Unprotection verify is achieved by  
bringing G and E to VIL while A0 is at VIL, A6 and  
A1 are at VIH and A9 remains at VID. In these  
conditions, reading the output data will yield 00h if  
the block defined by the inputs A13-A17 has been  
succesfully unprotected. Each block must be sepa-  
rately verified by giving its address in order to  
ensure that it has been unprotected.  
Output Disable. The data outputs are high imped-  
ance when the Output Enable G is High with Write  
Enable W High.  
Standby. The memory is in standby when Chip  
Enable E is High and the P/E.C. is idle. The power  
consumption is reduced to the standby level and  
the outputsare high impedance, independentofthe  
Output Enable G or Write Enable W inputs.  
Automatic Standby. After 150ns of bus inactivity  
and when CMOS levels are driving the addresses,  
the chip automatically enters a pseudo-standby  
mode where consumption is reduced to the CMOS  
standby value, while outputs still drive the bus.  
Electronic Signature. Two codes identifying the  
manufacturer and the device can be read from the  
memory. These codes allow programming equip-  
ment or applications to automatically match their  
interface to the characteristics of the M29F002.The  
Electronic Signature is output by a Read operation  
when the voltage applied toA9is atVID and address  
input A1 is Low. The manufacturer code is output  
when the Address input A0 is Low and the device  
code when this input is High. Other Address inputs  
are ignored.  
INSTRUCTIONS AND COMMANDS  
The Command Interface latchescommands written  
to the memory. Instructions are made up from one  
or more commands to perform Read MemoryArray,  
Read Electronic Signature, Read Block Protection,  
Program, Block Erase, Chip Erase, Erase Suspend  
and Erase Resume. Commands are made of ad-  
dress and data sequences.  
The Electronic Signature can also be read, without  
raising A9 to VID, by giving the memory the Instruc-  
tion AS.  
Block Protection. Each block can be separately  
protected against Program or Erase on program-  
ming equipment. Block protection provides addi-  
tional data security, as it disables all program or  
erase operations.This mode is activated when both  
A9 and G are raised to VID and an address in the  
block is applied on A13-A17. The Block Protection  
algorithm is shown in Figure 14. Block protection is  
initiated on the edge of W falling to VIL. Then after  
a delay of 100µs, the edge of W rising to VIH ends  
the protection operations. Block protection verify is  
achieved by bringing G, E, A0 and A6 to VIL and A1  
to VIH, while W is at VIH and A9 at VID. Under these  
conditions, reading the data output will yield 01h if  
the block defined by the inputs on A13-A17 is  
protected. Any attempt to program or erase a pro-  
tected block will be ignored by the device.  
Table 7. Commands  
Hex Code  
00h  
Command  
Invalid/Reserved  
10h  
Chip Erase Confirm  
Reserved  
20h  
30h  
Block Erase Resume/Confirm  
Set-up Erase  
80h  
Read Electronic Signature/  
Block Protection Status  
90h  
A0h  
B0h  
F0h  
Program  
Erase Suspend  
Read Array/Reset  
Block Temporary Unprotection. This feature is  
available on M29F002T and M29F002B only. Any  
previously protected block can be temporarily un-  
7/29  

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