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M27C202-45N3TR PDF预览

M27C202-45N3TR

更新时间: 2024-11-28 23:01:27
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 存储内存集成电路光电二极管可编程只读存储器OTP只读存储器电动程控只读存储器
页数 文件大小 规格书
15页 104K
描述
2 Mbit 128Kb x16 UV EPROM and OTP EPROM

M27C202-45N3TR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSOP包装说明:10 X 14 MM, PLASTIC, TSOP-40
针数:40Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.91Is Samacsys:N
最长访问时间:45 nsI/O 类型:COMMON
JESD-30 代码:R-PDSO-G40JESD-609代码:e0
长度:12.4 mm内存密度:2097152 bit
内存集成电路类型:OTP ROM内存宽度:16
功能数量:1端子数量:40
字数:131072 words字数代码:128000
工作模式:ASYNCHRONOUS最高工作温度:125 °C
最低工作温度:-40 °C组织:128KX16
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:TSOP1封装等效代码:TSSOP40,.56,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.05 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
Base Number Matches:1

M27C202-45N3TR 数据手册

 浏览型号M27C202-45N3TR的Datasheet PDF文件第2页浏览型号M27C202-45N3TR的Datasheet PDF文件第3页浏览型号M27C202-45N3TR的Datasheet PDF文件第4页浏览型号M27C202-45N3TR的Datasheet PDF文件第5页浏览型号M27C202-45N3TR的Datasheet PDF文件第6页浏览型号M27C202-45N3TR的Datasheet PDF文件第7页 
M27C202  
2 Mbit (128Kb x16) UV EPROM and OTP EPROM  
5V ± 10% SUPPLY VOLTAGE in READ  
OPERATION  
ACCESS TIME: 45ns  
LOW POWER CONSUMPTION:  
– Active Current 50mA at 5MHz  
– Standby Current 100µA  
40  
40  
1
1
PROGRAMMING VOLTAGE: 12.75V ± 0.25V  
PROGRAMMING TIME: 100µs/word  
ELECTRONIC SIGNATURE  
– Manufacturer Code: 20h  
FDIP40W (F)  
PDIP40 (B)  
– Device Code: 1Ch  
TSOP40 (N)  
10 x 14 mm  
DESCRIPTION  
PLCC44 (K)  
The M27C202 is a 2 Mbit EPROM offered in the  
two ranges UV (ultra violet erase) and OTP (one  
time programmable). It is ideally suited for micro-  
processor systems requiring large programs, in  
the application where the contents is stable and  
needs to be programmed only one time, and is or-  
ganised as 131,072 by 16 bits.  
Figure 1. Logic Diagram  
The FDIP40W (window ceramic frit-seal package)  
has a transparent lids which allow the user to ex-  
pose the chip to ultraviolet light to erase the bit pat-  
tern. A new pattern can then be written to the  
device by following the programming procedure.  
For applications where the content is programmed  
only one time and erasure is not required, the  
M27C202 is offered in PDIP40, PLCC44 and  
TSOP40 (10 x 14 mm) packages.  
V
V
CC  
PP  
17  
16  
A0-A16  
Q0-Q15  
P
E
M27C202  
G
V
SS  
AI01815  
April 1999  
1/15  

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