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M2004-11-627.3296LF PDF预览

M2004-11-627.3296LF

更新时间: 2024-11-30 08:08:43
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
10页 1598K
描述
Support Circuit, 1-Func

M2004-11-627.3296LF 数据手册

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M2004-11  
Micro Networks  
An Integrated Circuit Systems Company  
Preliminary Specifications  
M2004-11  
Frequency Synthesizer  
DESCRIPTION  
The M2004-11 integrates a high performance Phase  
Locked Loop (PLL) with a Voltage Controlled SAW  
Oscillator (VCSO) to provide a low jitter Frequency  
Translator in a 9mm x 9mm surface mount package.  
The M2004-11 is pin and function compatible with  
the M2004-01 and in addition includes a phase  
slope limiting circuit. This provides phase build-out  
protection when reselecting the input clock.  
The internal high “Q” SAW filter provides low jitter  
signal performance and determines the maximum  
output frequency of the VCSO. A programmable  
output divider can divide the VCSO frequency to  
achieve an output as low as 38.88MHz.  
FEATURES  
Pin Compatible with the M2004-01  
Build-in phase slope limiter for phase  
build-out protection  
The input to the Frequency Translator is provided by  
selecting between one of two output reference  
clocks. The output frequency is an integer multiple  
of the input reference frequency.  
Meets Bellcore GR-253-CORE MTIE  
Output Clock Frequency up to 700MHz  
Differential LVPECL Outputs  
Parallel and serial control of the output and  
feedback dividers is provided via the configuration  
logic. An external loop filter sets the PLL bandwidth  
which can be optimized to provide jitter attenuation  
of the input reference clock.  
Internal Low-jitter SAW-based Oscillator  
Intrinsic Jitter <1ps rms (12kHz - 20MHz)  
Jitter Attenuation of Input Reference Clock  
Dual Input MUX  
Parallel Programming  
The M2004-11 is available at SONET/SDH and  
10GbE frequencies up to 700MHz.  
Tunable Loop Filter Response  
3.3V Operation  
Small 9mm x 9mm SMT Package  
ABSOLUTE MAX RATINGS  
Inputs, VI :  
................................................. -0.5 to VCC+0.5V  
APPLICATIONS  
Output, VO : ................................................. -0.5 to VCC+0.5V  
Supply Voltage, VDD : ......................................................... 4.6 V  
Storage Temperature, TSTO :............................ -45°C to +100°C  
SONET / SDH / 10GbE System  
Synchronization  
Stresses beyond those listed under Absolute Maximum Ratings may cause  
permanent damage to the device. These ratings are stress specifications  
only. Functional operation of product at these conditions or any conditions  
beyond those listed in the DC Characteristics or AC Characteristics is not  
implied. Exposure to absolute maximum rating conditions for extended peri-  
ods may affect product reliability.  
Add / Drop Muxes, Access and Edge  
Switches  
Line Card System Clock Cleaner /  
Translator  
Optical Module Clock Cleaner / Translator  
ISO 9001  
Registered  
Micro Networks  
324 Clark Street  
Worcester, MA 01606  
tel: 508-852-5400  
fax: 508-852-8456  
www.micronetworks.com  
1

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